From: Alan Tull <atull@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Moritz Fischer <moritz.fischer@ettus.com>,
Alan Tull <atull@kernel.org>,
linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org,
Anatolij Gustschin <agust@denx.de>
Subject: [PATCH 2/8] dt: bindings: fpga: add xilinx slave-serial binding description
Date: Thu, 23 Mar 2017 19:34:25 -0500 [thread overview]
Message-ID: <1490315671-5076-3-git-send-email-atull@kernel.org> (raw)
In-Reply-To: <1490315671-5076-1-git-send-email-atull@kernel.org>
From: Anatolij Gustschin <agust@denx.de>
Add dt binding documentation details for Xilinx FPGA configuration
over slave serial interface.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Moritz Fischer <mdf@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Alan Tull <atull@kernel.org>
---
.../bindings/fpga/xilinx-slave-serial.txt | 44 ++++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt
diff --git a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt
new file mode 100644
index 0000000..9766f74
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt
@@ -0,0 +1,44 @@
+Xilinx Slave Serial SPI FPGA Manager
+
+Xilinx Spartan-6 FPGAs support a method of loading the bitstream over
+what is referred to as "slave serial" interface.
+The slave serial link is not technically SPI, and might require extra
+circuits in order to play nicely with other SPI slaves on the same bus.
+
+See https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
+
+Required properties:
+- compatible: should contain "xlnx,fpga-slave-serial"
+- reg: spi chip select of the FPGA
+- prog_b-gpios: config pin (referred to as PROGRAM_B in the manual)
+- done-gpios: config status pin (referred to as DONE in the manual)
+
+Example for full FPGA configuration:
+
+ fpga-region0 {
+ compatible = "fpga-region";
+ fpga-mgr = <&fpga_mgr_spi>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ };
+
+ spi1: spi@10680 {
+ compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
+ pinctrl-0 = <&spi0_pins>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ interrupts = <92>;
+ clocks = <&coreclk 0>;
+ status = "okay";
+
+ fpga_mgr_spi: fpga-mgr@0 {
+ compatible = "xlnx,fpga-slave-serial";
+ spi-max-frequency = <60000000>;
+ spi-cpha;
+ reg = <0>;
+ done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+ prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+ };
+ };
--
2.7.4
next prev parent reply other threads:[~2017-03-24 1:01 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-24 0:34 [PATCH 0/8] patches for fpga Alan Tull
2017-03-24 0:34 ` [PATCH 1/8] fpga: altera_freeze_bridge: Constify ops Alan Tull
2017-03-24 0:34 ` Alan Tull [this message]
2017-03-24 0:34 ` [PATCH 3/8] fpga manager: Add Xilinx slave serial SPI driver Alan Tull
2017-03-24 0:34 ` [PATCH 4/8] fpga: add config complete timeout Alan Tull
2017-03-24 0:34 ` [PATCH 5/8] fpga pr ip: Core driver support for Altera Partial Reconfiguration IP Alan Tull
2017-03-24 0:34 ` [PATCH 6/8] fpga dt: bindings " Alan Tull
2017-03-24 0:34 ` [PATCH 7/8] fpga pr ip: Platform driver " Alan Tull
2017-03-24 0:34 ` [PATCH 8/8] MAINTAINERS: Add file patterns for fpga device tree bindings Alan Tull
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