From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: Borislav Petkov <bp@suse.de>
Cc: Ingo Molnar <mingo@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Andrew Morton <akpm@linux-foundation.org>,
Brian Gerst <brgerst@gmail.com>,
Chris Metcalf <cmetcalf@mellanox.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
Huang Rui <ray.huang@amd.com>, Jiri Slaby <jslaby@suse.cz>,
Jonathan Corbet <corbet@lwn.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
Vlastimil Babka <vbabka@suse.cz>, Chen Yucong <slaoub@gmail.com>,
Alexandre Julliard <julliard@winehq.org>,
Stas Sergeev <stsp@list.ru>, Fenghua Yu <fenghua.yu@intel.com>,
"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
Shuah Khan <shuah@kernel.org>,
linux-kernel@vger.kernel.org, x86@kernel.org,
linux-msdos@vger.kernel.org, wine-devel@winehq.org,
Adam Buchbinder <adam.buchbinder@gmail.com>,
Colin Ian King <colin.king@canonical.com>,
Lorenzo Stoakes <lstoakes@gmail.com>,
Qiaowei Ren <qiaowei.ren@intel.com>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Kees Cook <keescook@chromium.org>,
Thomas Garnier <thgarnie@google.com>,
Dmitry Vyukov <dvyukov@google.com>
Subject: Re: [PATCH v7 13/26] x86/insn-eval: Add function to get default params of code segment
Date: Thu, 15 Jun 2017 12:24:35 -0700 [thread overview]
Message-ID: <1497554675.133434.3.camel@ranerica-desktop> (raw)
In-Reply-To: <20170607125934.27jiyy636wgjrmck@pd.tnic>
On Wed, 2017-06-07 at 14:59 +0200, Borislav Petkov wrote:
> On Fri, May 05, 2017 at 11:17:11AM -0700, Ricardo Neri wrote:
> > This function returns the default values of the address and operand sizes
> > as specified in the segment descriptor. This information is determined
> > from the D and L bits. Hence, it can be used for both IA-32e 64-bit and
> > 32-bit legacy modes. For virtual-8086 mode, the default address and
> > operand sizes are always 2 bytes.
> >
> > The D bit is only meaningful for code segments. Thus, these functions
> > always use the code segment selector contained in regs.
> >
> > Cc: Dave Hansen <dave.hansen@linux.intel.com>
> > Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
> > Cc: Colin Ian King <colin.king@canonical.com>
> > Cc: Lorenzo Stoakes <lstoakes@gmail.com>
> > Cc: Qiaowei Ren <qiaowei.ren@intel.com>
> > Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
> > Cc: Masami Hiramatsu <mhiramat@kernel.org>
> > Cc: Adrian Hunter <adrian.hunter@intel.com>
> > Cc: Kees Cook <keescook@chromium.org>
> > Cc: Thomas Garnier <thgarnie@google.com>
> > Cc: Peter Zijlstra <peterz@infradead.org>
> > Cc: Borislav Petkov <bp@suse.de>
> > Cc: Dmitry Vyukov <dvyukov@google.com>
> > Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
> > Cc: x86@kernel.org
> > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> > ---
> > arch/x86/include/asm/insn-eval.h | 6 ++++
> > arch/x86/lib/insn-eval.c | 65 ++++++++++++++++++++++++++++++++++++++++
> > 2 files changed, 71 insertions(+)
> >
> > diff --git a/arch/x86/include/asm/insn-eval.h b/arch/x86/include/asm/insn-eval.h
> > index 7f3c7fe..9ed1c88 100644
> > --- a/arch/x86/include/asm/insn-eval.h
> > +++ b/arch/x86/include/asm/insn-eval.h
> > @@ -11,9 +11,15 @@
> > #include <linux/err.h>
> > #include <asm/ptrace.h>
> >
> > +struct insn_code_seg_defaults {
>
> A whole struct for a function which gets called only once?
>
> Bah, that's a bit too much, if you ask me.
>
> So you're returning two small unsigned integers - i.e., you can just as
> well return a single u8 and put address and operand sizes in there:
>
> ret = oper_sz | addr_sz << 4;
>
> No need for special structs for that.
OK. This makes sense. Perhaps I can use a couple of #define's to set and
get the the address and operand sizes in a single u8. This would make
the code more readable.
>
> > + unsigned char address_bytes;
> > + unsigned char operand_bytes;
> > +};
> > +
> > void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs);
> > int insn_get_modrm_rm_off(struct insn *insn, struct pt_regs *regs);
> > unsigned long insn_get_seg_base(struct pt_regs *regs, struct insn *insn,
> > int regoff);
> > +struct insn_code_seg_defaults insn_get_code_seg_defaults(struct pt_regs *regs);
> >
> > #endif /* _ASM_X86_INSN_EVAL_H */
> > diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c
> > index c77ed80..693e5a8 100644
> > --- a/arch/x86/lib/insn-eval.c
> > +++ b/arch/x86/lib/insn-eval.c
> > @@ -603,6 +603,71 @@ static unsigned long get_seg_limit(struct pt_regs *regs, struct insn *insn,
> > }
> >
> > /**
> > + * insn_get_code_seg_defaults() - Obtain code segment default parameters
> > + * @regs: Structure with register values as seen when entering kernel mode
> > + *
> > + * Obtain the default parameters of the code segment: address and operand sizes.
> > + * The code segment is obtained from the selector contained in the CS register
> > + * in regs. In protected mode, the default address is determined by inspecting
> > + * the L and D bits of the segment descriptor. In virtual-8086 mode, the default
> > + * is always two bytes for both address and operand sizes.
> > + *
> > + * Return: A populated insn_code_seg_defaults structure on success. The
> > + * structure contains only zeros on failure.
>
> s/failure/error/
Will correct.
>
> > + */
> > +struct insn_code_seg_defaults insn_get_code_seg_defaults(struct pt_regs *regs)
> > +{
> > + struct desc_struct *desc;
> > + struct insn_code_seg_defaults defs;
> > + unsigned short sel;
> > + /*
> > + * The most significant byte of AR_TYPE_MASK determines whether a
> > + * segment contains data or code.
> > + */
> > + unsigned int type_mask = AR_TYPE_MASK & (1 << 11);
> > +
> > + memset(&defs, 0, sizeof(defs));
> > +
> > + if (v8086_mode(regs)) {
> > + defs.address_bytes = 2;
> > + defs.operand_bytes = 2;
> > + return defs;
> > + }
> > +
> > + sel = (unsigned short)regs->cs;
> > +
> > + desc = get_desc(sel);
> > + if (!desc)
> > + return defs;
> > +
> > + /* if data segment, return */
> > + if (!(desc->b & type_mask))
> > + return defs;
>
> So you can simplify that into:
>
> /* A code segment? */
> if (!(desc->b & BIT(11)))
> return defs;
>
> and remove that type_mask thing.
Alternatively, I can do desc->type & BIT(3) to avoid using desc-b, which
is less elegant.
Thanks and BR,
Ricardo
next prev parent reply other threads:[~2017-06-15 19:24 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-05 18:16 [PATCH v7 00/26] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-05-05 18:16 ` [PATCH v7 01/26] ptrace,x86: Make user_64bit_mode() available to 32-bit builds Ricardo Neri
2017-05-21 14:19 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 02/26] x86/mm: Relocate page fault error codes to traps.h Ricardo Neri
2017-05-21 14:23 ` Borislav Petkov
2017-05-27 3:40 ` Ricardo Neri
2017-05-27 10:13 ` Borislav Petkov
2017-06-01 3:09 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 03/26] x86/mpx: Use signed variables to compute effective addresses Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 04/26] x86/mpx: Do not use SIB.index if its value is 100b and ModRM.mod is not 11b Ricardo Neri
2017-05-24 13:37 ` Borislav Petkov
2017-05-27 3:36 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 05/26] x86/mpx: Do not use SIB.base if its value is 101b and ModRM.mod = 0 Ricardo Neri
2017-05-29 13:07 ` Borislav Petkov
2017-06-06 6:08 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 06/26] x86/mpx, x86/insn: Relocate insn util functions to a new insn-eval file Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 07/26] x86/insn-eval: Do not BUG on invalid register type Ricardo Neri
2017-05-29 16:37 ` Borislav Petkov
2017-06-06 6:06 ` Ricardo Neri
2017-06-06 11:58 ` Borislav Petkov
2017-06-07 0:28 ` Ricardo Neri
2017-06-07 12:21 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 08/26] x86/insn-eval: Add a utility function to get register offsets Ricardo Neri
2017-05-29 17:16 ` Borislav Petkov
2017-06-06 6:02 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 09/26] x86/insn-eval: Add utility function to identify string instructions Ricardo Neri
2017-05-29 21:48 ` Borislav Petkov
2017-06-06 6:01 ` Ricardo Neri
2017-06-06 12:04 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 10/26] x86/insn-eval: Add utility functions to get segment selector Ricardo Neri
2017-05-30 10:35 ` Borislav Petkov
2017-06-15 18:37 ` Ricardo Neri
2017-06-15 19:04 ` Ricardo Neri
2017-06-19 15:29 ` Borislav Petkov
2017-06-19 15:37 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 11/26] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 12/26] x86/insn-eval: Add utility functions to get segment descriptor base address and limit Ricardo Neri
2017-05-31 16:58 ` Borislav Petkov
2017-06-03 17:23 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 13/26] x86/insn-eval: Add function to get default params of code segment Ricardo Neri
2017-06-07 12:59 ` Borislav Petkov
2017-06-15 19:24 ` Ricardo Neri [this message]
2017-06-19 17:11 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 14/26] x86/insn-eval: Indicate a 32-bit displacement if ModRM.mod is 0 and ModRM.rm is 5 Ricardo Neri
2017-06-07 13:15 ` Borislav Petkov
2017-06-15 19:36 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 15/26] x86/insn-eval: Incorporate segment base and limit in linear address computation Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 16/26] x86/insn-eval: Support both signed 32-bit and 64-bit effective addresses Ricardo Neri
2017-06-07 15:48 ` Borislav Petkov
2017-07-25 23:48 ` Ricardo Neri
2017-07-27 13:26 ` Borislav Petkov
2017-07-28 2:04 ` Ricardo Neri
2017-07-28 6:50 ` Borislav Petkov
2017-06-07 15:49 ` Borislav Petkov
2017-06-15 19:58 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 17/26] x86/insn-eval: Handle 32-bit address encodings in virtual-8086 mode Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 18/26] x86/insn-eval: Add support to resolve 16-bit addressing encodings Ricardo Neri
2017-06-07 16:28 ` Borislav Petkov
2017-06-15 21:50 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 19/26] x86/insn-eval: Add wrapper function for 16-bit and 32-bit address encodings Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 20/26] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri
2017-05-06 9:04 ` Paolo Bonzini
2017-05-11 3:23 ` Ricardo Neri
2017-06-07 18:24 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 21/26] x86: Add emulation code for UMIP instructions Ricardo Neri
2017-06-08 18:38 ` Borislav Petkov
2017-06-17 1:34 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 22/26] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri
2017-06-09 11:02 ` Borislav Petkov
2017-07-25 23:50 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 23/26] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri
2017-06-09 13:02 ` Borislav Petkov
2017-07-25 23:51 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 24/26] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-06-09 16:10 ` Borislav Petkov
2017-07-26 0:44 ` Ricardo Neri
2017-07-27 13:57 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 25/26] selftests/x86: Add tests for " Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 26/26] selftests/x86: Add tests for instruction str and sldt Ricardo Neri
2017-05-17 18:42 ` [PATCH v7 00/26] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-05-27 3:49 ` Neri, Ricardo
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