From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Andy Lutomirski <luto@kernel.org>,
"H . Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@kernel.org>
Cc: Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Markus T Metzger <markus.t.metzger@intel.com>,
Ravi Shankar <ravi.v.shankar@intel.com>,
"Chang S . Bae" <chang.seok.bae@intel.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: [RESEND PATCH V5 6/8] x86/segments/64: Rename PER_CPU segment to CPU_NUMBER
Date: Thu, 23 Aug 2018 09:44:36 -0700 [thread overview]
Message-ID: <1535042678-31366-7-git-send-email-chang.seok.bae@intel.com> (raw)
In-Reply-To: <1535042678-31366-1-git-send-email-chang.seok.bae@intel.com>
64-bit doesn't use the entry for per CPU data, but for CPU
(and node) numbers. The change will clarify the real usage
of this entry in GDT.
Suggested-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Acked-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
---
arch/x86/entry/vdso/vma.c | 2 +-
arch/x86/include/asm/segment.h | 5 ++---
arch/x86/include/asm/vgtod.h | 6 +++---
3 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/x86/entry/vdso/vma.c b/arch/x86/entry/vdso/vma.c
index 5b8b556..0b114aa 100644
--- a/arch/x86/entry/vdso/vma.c
+++ b/arch/x86/entry/vdso/vma.c
@@ -359,7 +359,7 @@ static void vgetcpu_cpu_init(void *arg)
d.p = 1; /* Present */
d.d = 1; /* 32-bit */
- write_gdt_entry(get_cpu_gdt_rw(cpu), GDT_ENTRY_PER_CPU, &d, DESCTYPE_S);
+ write_gdt_entry(get_cpu_gdt_rw(cpu), GDT_ENTRY_CPU_NUMBER, &d, DESCTYPE_S);
}
static int vgetcpu_online(unsigned int cpu)
diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
index e293c12..e3e788ea 100644
--- a/arch/x86/include/asm/segment.h
+++ b/arch/x86/include/asm/segment.h
@@ -186,8 +186,7 @@
#define GDT_ENTRY_TLS_MIN 12
#define GDT_ENTRY_TLS_MAX 14
-/* Abused to load per CPU data from limit */
-#define GDT_ENTRY_PER_CPU 15
+#define GDT_ENTRY_CPU_NUMBER 15
/*
* Number of entries in the GDT table:
@@ -207,7 +206,7 @@
#define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS*8 + 3)
#define __USER32_DS __USER_DS
#define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS*8 + 3)
-#define __PER_CPU_SEG (GDT_ENTRY_PER_CPU*8 + 3)
+#define __CPU_NUMBER_SEG (GDT_ENTRY_CPU_NUMBER*8 + 3)
#endif
diff --git a/arch/x86/include/asm/vgtod.h b/arch/x86/include/asm/vgtod.h
index fb856c9..dd58a2e 100644
--- a/arch/x86/include/asm/vgtod.h
+++ b/arch/x86/include/asm/vgtod.h
@@ -86,8 +86,8 @@ static inline unsigned int __getcpu(void)
unsigned int p;
/*
- * Load per CPU data from GDT. LSL is faster than RDTSCP and
- * works on all CPUs. This is volatile so that it orders
+ * Load CPU (and node) number from GDT. LSL is faster than RDTSCP
+ * and works on all CPUs. This is volatile so that it orders
* correctly wrt barrier() and to keep gcc from cleverly
* hoisting it out of the calling function.
*
@@ -96,7 +96,7 @@ static inline unsigned int __getcpu(void)
alternative_io ("lsl %[p],%[seg]",
".byte 0xf3,0x0f,0xc7,0xf8", /* RDPID %eax/rax */
X86_FEATURE_RDPID,
- [p] "=a" (p), [seg] "r" (__PER_CPU_SEG));
+ [p] "=a" (p), [seg] "r" (__CPU_NUMBER_SEG));
return p;
}
--
2.7.4
next prev parent reply other threads:[~2018-08-23 16:45 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-23 16:44 [RESEND PATCH V5 0/8] x86: infrastructure to enable FSGSBASE Chang S. Bae
2018-08-23 16:44 ` [RESEND PATCH V5 1/8] x86/arch_prctl/64: Make ptrace read FS/GS base accurately Chang S. Bae
2018-08-23 16:44 ` [RESEND PATCH V5 2/8] x86/fsgsbase/64: Introduce FS/GS base helper functions Chang S. Bae
2018-08-23 16:44 ` [RESEND PATCH V5 3/8] x86/fsgsbase/64: Make ptrace use FS/GS base helpers Chang S. Bae
2018-08-23 16:44 ` [RESEND PATCH V5 4/8] x86/fsgsbase/64: Use FS/GS base helpers in core dump Chang S. Bae
2018-08-23 16:44 ` [RESEND PATCH V5 5/8] x86/fsgsbase/64: Factor out load FS/GS segments from __switch_to Chang S. Bae
2018-08-23 16:44 ` Chang S. Bae [this message]
2018-08-23 16:44 ` [RESEND PATCH V5 7/8] x86/vdso: Introduce helper functions for CPU and node number Chang S. Bae
2018-08-23 16:44 ` [RESEND PATCH V5 8/8] x86/vdso: Move out the CPU initialization Chang S. Bae
2018-09-14 9:27 ` [RESEND PATCH V5 0/8] x86: infrastructure to enable FSGSBASE Ingo Molnar
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