From: "A.s. Dong" <aisheng.dong@nxp.com>
To: "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"sboyd@kernel.org" <sboyd@kernel.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
Anson Huang <anson.huang@nxp.com>, Jacky Bai <ping.bai@nxp.com>,
dl-linux-imx <linux-imx@nxp.com>,
"A.s. Dong" <aisheng.dong@nxp.com>,
Stephen Boyd <sboyd@codeaurora.org>
Subject: [PATCH V6 2/9] clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support
Date: Wed, 14 Nov 2018 13:01:39 +0000 [thread overview]
Message-ID: <1542200198-3017-3-git-send-email-aisheng.dong@nxp.com> (raw)
In-Reply-To: <1542200198-3017-1-git-send-email-aisheng.dong@nxp.com>
Adding CLK_FRAC_DIVIDER_ZERO_BASED flag to indicate the numerator and
denominator value in register are start from 0.
This can be used to support frac dividers like below:
Divider output clock = Divider input clock x [(frac +1) / (div +1)]
where frac/div in register is:
000b - Divide by 1.
001b - Divide by 2.
010b - Divide by 3.
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
---
ChangeLog:
v3->v4:
* no changes
v2->v3:
* no changes
v1->v2:
* improve comments suggested by Stephen
---
drivers/clk/clk-fractional-divider.c | 10 ++++++++++
include/linux/clk-provider.h | 8 ++++++++
2 files changed, 18 insertions(+)
diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c
index fdf625f..7ccde6b 100644
--- a/drivers/clk/clk-fractional-divider.c
+++ b/drivers/clk/clk-fractional-divider.c
@@ -40,6 +40,11 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,
m = (val & fd->mmask) >> fd->mshift;
n = (val & fd->nmask) >> fd->nshift;
+ if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {
+ m++;
+ n++;
+ }
+
if (!n || !m)
return parent_rate;
@@ -103,6 +108,11 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate,
GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
&m, &n);
+ if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {
+ m--;
+ n--;
+ }
+
if (fd->lock)
spin_lock_irqsave(fd->lock, flags);
else
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 08b1aa7..bee6453 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -594,6 +594,12 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw);
* @lock: register lock
*
* Clock with adjustable fractional divider affecting its output frequency.
+ *
+ * Flags:
+ * CLK_FRAC_DIVIDER_ZERO_BASED - by default the numerator and denominator
+ * is the value read from the register. If CLK_FRAC_DIVIDER_ZERO_BASED
+ * is set then the numerator and denominator are both the value read
+ * plus one.
*/
struct clk_fractional_divider {
struct clk_hw hw;
@@ -613,6 +619,8 @@ struct clk_fractional_divider {
#define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw)
+#define CLK_FRAC_DIVIDER_ZERO_BASED BIT(0)
+
extern const struct clk_ops clk_fractional_divider_ops;
struct clk *clk_register_fractional_divider(struct device *dev,
const char *name, const char *parent_name, unsigned long flags,
--
2.7.4
next prev parent reply other threads:[~2018-11-14 13:02 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-14 13:01 [PATCH V6 0/9] clk: add imx7ulp clk support A.s. Dong
2018-11-14 13:01 ` [PATCH V6 1/9] clk: imx: add gatable clock divider support A.s. Dong
2018-12-03 19:31 ` Stephen Boyd
2018-11-14 13:01 ` A.s. Dong [this message]
2018-12-03 19:31 ` [PATCH V6 2/9] clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support Stephen Boyd
2018-11-14 13:01 ` [PATCH V6 3/9] clk: imx: add pllv4 support A.s. Dong
2018-12-03 19:31 ` Stephen Boyd
2018-11-14 13:01 ` [PATCH V6 4/9] clk: imx: add pfdv2 support A.s. Dong
2018-12-03 19:31 ` Stephen Boyd
2018-11-14 13:01 ` [PATCH V6 5/9] clk: imx: add imx7ulp composite clk support A.s. Dong
2018-12-03 19:31 ` Stephen Boyd
2018-11-14 13:01 ` [PATCH V6 6/9] dt-bindings: clock: add imx7ulp clock binding doc A.s. Dong
2018-12-03 19:32 ` Stephen Boyd
2018-11-14 13:02 ` [PATCH V6 7/9] clk: imx: make mux parent strings const A.s. Dong
2018-12-03 19:32 ` Stephen Boyd
2018-11-14 13:02 ` [PATCH V6 8/9] clk: imx: implement new clk_hw based APIs A.s. Dong
2018-12-03 19:32 ` Stephen Boyd
2018-11-14 13:02 ` [PATCH V6 9/9] clk: imx: add imx7ulp clk driver A.s. Dong
2018-12-03 19:32 ` Stephen Boyd
2018-12-03 19:31 ` [PATCH V6 0/9] clk: add imx7ulp clk support Stephen Boyd
2018-12-04 1:29 ` Aisheng DONG
2018-12-05 19:41 ` Stephen Boyd
2018-12-10 8:14 ` Shawn Guo
2018-12-10 19:20 ` Stephen Boyd
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