From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82ED8C43219 for ; Tue, 30 Apr 2019 09:45:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5CC4D21783 for ; Tue, 30 Apr 2019 09:45:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727299AbfD3Jp5 (ORCPT ); Tue, 30 Apr 2019 05:45:57 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:48767 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727068AbfD3Jp3 (ORCPT ); Tue, 30 Apr 2019 05:45:29 -0400 X-UUID: de806874b1c34150b95615d23c81ffc6-20190430 X-UUID: de806874b1c34150b95615d23c81ffc6-20190430 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 973128999; Tue, 30 Apr 2019 17:45:21 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 30 Apr 2019 17:45:20 +0800 Received: from mtkslt205.mediatek.inc (10.21.15.75) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 30 Apr 2019 17:45:20 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd CC: Nicolas Boichat , Fan Chen , James Liao , Weiyi Lu , , , , , Henry Chen Subject: [RFC V2 11/11] arm64: dts: mt8183: Add interconnect provider DT nodes Date: Tue, 30 Apr 2019 16:51:05 +0800 Message-ID: <1556614265-12745-12-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1556614265-12745-1-git-send-email-henryc.chen@mediatek.com> References: <1556614265-12745-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 49CC5D9D103BFB28D9BFC001BF05DC1514CC9149507117BCD0812460867759DD2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DDR EMI provider dictating dram interconnect bus performance found on MT8183-based platforms Signed-off-by: Henry Chen --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index d298013..ab98adb 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include / { compatible = "mediatek,mt8183"; @@ -139,6 +140,10 @@ reg = <0 0x10012000 0 0x1000>; clocks = <&infracfg CLK_INFRA_DVFSRC>; clock-names = "dvfsrc"; + ddr_emi: interconnect { + compatible = "mediatek,mt8183-emi-icc"; + #interconnect-cells = <1>; + }; }; timer { -- 1.9.1