From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Robin Murphy <robin.murphy@arm.com>,
Rob Herring <robh+dt@kernel.org>
Cc: Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
Will Deacon <will.deacon@arm.com>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<iommu@lists.linux-foundation.org>, <yingjoe.chen@mediatek.com>,
<yong.wu@mediatek.com>, <youlin.pei@mediatek.com>,
Nicolas Boichat <drinkcat@chromium.org>, <anan.sun@mediatek.com>,
Matthias Kaehlcke <mka@chromium.org>
Subject: [PATCH v8 05/21] iommu/mediatek: Fix iova_to_phys PA start for 4GB mode
Date: Sat, 29 Jun 2019 10:09:11 +0800 [thread overview]
Message-ID: <1561774167-24141-6-git-send-email-yong.wu@mediatek.com> (raw)
In-Reply-To: <1561774167-24141-1-git-send-email-yong.wu@mediatek.com>
In the 4GB mode, the physical address is remapped,
Here is the detailed remap relationship.
CPU PA -> HW PA
0x4000_0000 0x1_4000_0000 (Add bit32)
0x8000_0000 0x1_8000_0000 ...
0xc000_0000 0x1_c000_0000 ...
0x1_0000_0000 0x1_0000_0000 (No change)
The PA in the iova_to_phys that is got from v7s always is u32, But
from the CPU point of view, PA should add BIT(32) when PA < 0x4000_0000.
Fixes: 30e2fccf9512 ("iommu/mediatek: Enlarge the validate PA range
for 4GB mode")
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
drivers/iommu/mtk_iommu.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 1ddb2b7..fefc2e0 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -115,6 +115,19 @@ struct mtk_iommu_domain {
static const struct iommu_ops mtk_iommu_ops;
+/*
+ * In M4U 4GB mode, the physical address is remapped as below:
+ * CPU PA -> M4U HW PA
+ * 0x4000_0000 0x1_4000_0000 (Add bit32)
+ * 0x8000_0000 0x1_8000_0000 ...
+ * 0xc000_0000 0x1_c000_0000 ...
+ * 0x1_0000_0000 0x1_0000_0000 (No change)
+ *
+ * The PA in the iova_to_phys that is got from v7s always is u32, But from
+ * the CPU point of view, PA should add BIT(32) when PA < 0x4000_0000.
+ */
+#define MTK_IOMMU_4GB_MODE_REMAP_BASE 0x40000000
+
static LIST_HEAD(m4ulist); /* List all the M4U HWs */
#define for_each_m4u(data) list_for_each_entry(data, &m4ulist, list)
@@ -409,7 +422,7 @@ static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain,
pa = dom->iop->iova_to_phys(dom->iop, iova);
spin_unlock_irqrestore(&dom->pgtlock, flags);
- if (data->enable_4GB)
+ if (data->enable_4GB && pa < MTK_IOMMU_4GB_MODE_REMAP_BASE)
pa |= BIT_ULL(32);
return pa;
--
1.9.1
next prev parent reply other threads:[~2019-06-29 2:11 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-29 2:09 [PATCH v8 00/21] MT8183 IOMMU SUPPORT Yong Wu
2019-06-29 2:09 ` [PATCH v8 01/21] dt-bindings: mediatek: Add binding for mt8183 IOMMU and SMI Yong Wu
2019-06-29 2:09 ` [PATCH v8 02/21] iommu/mediatek: Use a struct as the platform data Yong Wu
2019-06-29 2:09 ` [PATCH v8 03/21] memory: mtk-smi: Use a general config_port interface Yong Wu
2019-06-29 2:09 ` [PATCH v8 04/21] memory: mtk-smi: Use a struct for the platform data for smi-common Yong Wu
2019-06-29 2:09 ` Yong Wu [this message]
2019-06-29 2:09 ` [PATCH v8 06/21] iommu/io-pgtable-arm-v7s: Add paddr_to_iopte and iopte_to_paddr helpers Yong Wu
2019-06-29 2:09 ` [PATCH v8 07/21] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB Mode Yong Wu
2019-07-10 14:36 ` Will Deacon
2019-07-11 11:53 ` Yong Wu
2019-07-11 12:31 ` Will Deacon
2019-07-14 4:41 ` Yong Wu
2019-07-15 9:51 ` Will Deacon
2019-07-17 12:44 ` Yong Wu
2019-07-17 14:23 ` Will Deacon
2019-07-18 5:37 ` Yong Wu
2019-06-29 2:09 ` [PATCH v8 08/21] iommu/mediatek: Add bclk can be supported optionally Yong Wu
2019-06-29 2:09 ` [PATCH v8 09/21] iommu/mediatek: Add larb-id remapped support Yong Wu
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