From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 108C5CA9EA0 for ; Fri, 18 Oct 2019 15:38:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DE04B21852 for ; Fri, 18 Oct 2019 15:37:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="v470AP/W" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393145AbfJRPh6 (ORCPT ); Fri, 18 Oct 2019 11:37:58 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:60928 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730468AbfJRPh6 (ORCPT ); Fri, 18 Oct 2019 11:37:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1571413074; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yvFr+nNghkKZwR4mawCKvHUmrMBJduw6erMI6YTlcHM=; b=v470AP/WoXYbHAA0MikRhd2C2Q47Jva7B2tAsqSQJh2nMYK2q/AuxV6ILjajalIe9ifrUq QQ5AMEkFZxjYo9B3QckbJkKJ22INg6mA+cpEFKl/QqzArCcPa/pKii/EQODfOjJpBl38Oc nlS76mnfHy2OQjR4ZofesDfcpS7rIQ0= Date: Fri, 18 Oct 2019 17:37:47 +0200 From: Paul Cercueil Subject: Re: [PATCH 6/6 v2] MMC: JZ4740: Add support for LPM. To: Ulf Hansson Cc: Zhou Yanjie , linux-mips@vger.kernel.org, Linux Kernel Mailing List , linux-mmc@vger.kernel.org, DTML , Rob Herring , Paul Burton , Mark Rutland , syq@debian.org, Linus Walleij , armijn@tjaldur.nl, Thomas Gleixner , YueHaibing , Mathieu Malaterre , Ezequiel Garcia Message-Id: <1571413067.3.0@crapouillou.net> In-Reply-To: References: <1567669089-88693-1-git-send-email-zhouyanjie@zoho.com> <1570857203-49192-1-git-send-email-zhouyanjie@zoho.com> <1570857203-49192-7-git-send-email-zhouyanjie@zoho.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Uffe, Le ven., oct. 18, 2019 at 10:52, Ulf Hansson a=20 =E9crit : > On Sat, 12 Oct 2019 at 07:19, Zhou Yanjie wrote: >>=20 >> add support for low power mode of Ingenic's MMC/SD Controller. >>=20 >> Signed-off-by: Zhou Yanjie >=20 > I couldn't find a proper coverletter for the series, please provide > that next time as it really helps review. Additionally, it seems like > you forgot to change the prefix of the patches to "mmc: jz4740" (or at > least you chosed upper case letters), but I will take care of that > this time. So, I have applied the series for next, thanks! >=20 > I also have a general question. Should we perhaps rename the driver > from jz4740_mmc.c to ingenic.c (and the file for the DT bindings, the > Kconfig, etc), as that seems like a more appropriate name? No? Is there a kernel policy regarding renaming drivers? Since it trashes=20 the git history. Anyway you're the subsystem maintainer so I guess=20 that's up to you. I can send a patch to rename it if you want. Cheers, -Paul >=20 > Kind regards > Uffe >=20 >=20 >> --- >> drivers/mmc/host/jz4740_mmc.c | 23 +++++++++++++++++++++++ >> 1 file changed, 23 insertions(+) >>=20 >> diff --git a/drivers/mmc/host/jz4740_mmc.c=20 >> b/drivers/mmc/host/jz4740_mmc.c >> index 44a04fe..4cbe7fb 100644 >> --- a/drivers/mmc/host/jz4740_mmc.c >> +++ b/drivers/mmc/host/jz4740_mmc.c >> @@ -43,6 +43,7 @@ >> #define JZ_REG_MMC_RESP_FIFO 0x34 >> #define JZ_REG_MMC_RXFIFO 0x38 >> #define JZ_REG_MMC_TXFIFO 0x3C >> +#define JZ_REG_MMC_LPM 0x40 >> #define JZ_REG_MMC_DMAC 0x44 >>=20 >> #define JZ_MMC_STRPCL_EXIT_MULTIPLE BIT(7) >> @@ -102,6 +103,12 @@ >> #define JZ_MMC_DMAC_DMA_SEL BIT(1) >> #define JZ_MMC_DMAC_DMA_EN BIT(0) >>=20 >> +#define JZ_MMC_LPM_DRV_RISING BIT(31) >> +#define JZ_MMC_LPM_DRV_RISING_QTR_PHASE_DLY BIT(31) >> +#define JZ_MMC_LPM_DRV_RISING_1NS_DLY BIT(30) >> +#define JZ_MMC_LPM_SMP_RISING_QTR_OR_HALF_PHASE_DLY BIT(29) >> +#define JZ_MMC_LPM_LOW_POWER_MODE_EN BIT(0) >> + >> #define JZ_MMC_CLK_RATE 24000000 >>=20 >> enum jz4740_mmc_version { >> @@ -860,6 +867,22 @@ static int jz4740_mmc_set_clock_rate(struct=20 >> jz4740_mmc_host *host, int rate) >> } >>=20 >> writew(div, host->base + JZ_REG_MMC_CLKRT); >> + >> + if (real_rate > 25000000) { >> + if (host->version >=3D JZ_MMC_X1000) { >> + writel(JZ_MMC_LPM_DRV_RISING_QTR_PHASE_DLY | >> + =20 >> JZ_MMC_LPM_SMP_RISING_QTR_OR_HALF_PHASE_DLY | >> + JZ_MMC_LPM_LOW_POWER_MODE_EN, >> + host->base + JZ_REG_MMC_LPM); >> + } else if (host->version >=3D JZ_MMC_JZ4760) { >> + writel(JZ_MMC_LPM_DRV_RISING | >> + JZ_MMC_LPM_LOW_POWER_MODE_EN, >> + host->base + JZ_REG_MMC_LPM); >> + } else if (host->version >=3D JZ_MMC_JZ4725B) >> + writel(JZ_MMC_LPM_LOW_POWER_MODE_EN, >> + host->base + JZ_REG_MMC_LPM); >> + } >> + >> return real_rate; >> } >>=20 >> -- >> 2.7.4 >>=20 >>=20 =