From: "tip-bot2 for Thomas Gleixner" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
Alexandre Chartre <alexandre.chartre@oracle.com>,
Peter Zijlstra <peterz@infradead.org>,
Andy Lutomirski <luto@kernel.org>, x86 <x86@kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: [tip: x86/entry] x86/entry/64: Provide sane error entry/exit
Date: Tue, 19 May 2020 19:58:37 -0000 [thread overview]
Message-ID: <158991831702.17951.16780777270107867698.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20200505134904.058904490@linutronix.de>
The following commit has been merged into the x86/entry branch of tip:
Commit-ID: 3660da2d124813bed342e25b39df0251cbe2ac4f
Gitweb: https://git.kernel.org/tip/3660da2d124813bed342e25b39df0251cbe2ac4f
Author: Thomas Gleixner <tglx@linutronix.de>
AuthorDate: Thu, 26 Mar 2020 16:56:20 +01:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Tue, 19 May 2020 16:03:56 +02:00
x86/entry/64: Provide sane error entry/exit
For gradual conversion provide a macro parameter and the required code
which allows to handle instrumentation and interrupt flags tracking in C.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Andy Lutomirski <luto@kernel.org>
Link: https://lkml.kernel.org/r/20200505134904.058904490@linutronix.de
---
arch/x86/entry/entry_64.S | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 01bfe7f..96ad26f 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -499,8 +499,9 @@ SYM_CODE_END(spurious_entries_start)
* @vector: Vector number
* @cfunc: C function to be called
* @has_error_code: Hardware pushed error code on stack
+ * @sane: Sane variant which handles irq tracing, context tracking in C
*/
-.macro idtentry_body vector cfunc has_error_code:req
+.macro idtentry_body vector cfunc has_error_code:req sane=0
call error_entry
UNWIND_HINT_REGS
@@ -514,6 +515,7 @@ SYM_CODE_END(spurious_entries_start)
GET_CR2_INTO(%r12);
.endif
+ .if \sane == 0
TRACE_IRQS_OFF
#ifdef CONFIG_CONTEXT_TRACKING
@@ -522,6 +524,7 @@ SYM_CODE_END(spurious_entries_start)
CALL_enter_from_user_mode
.Lfrom_kernel_no_ctxt_tracking_\@:
#endif
+ .endif
movq %rsp, %rdi /* pt_regs pointer into 1st argument*/
@@ -538,7 +541,11 @@ SYM_CODE_END(spurious_entries_start)
call \cfunc
+ .if \sane == 0
jmp error_exit
+ .else
+ jmp error_return
+ .endif
.endm
/**
@@ -547,11 +554,12 @@ SYM_CODE_END(spurious_entries_start)
* @asmsym: ASM symbol for the entry point
* @cfunc: C function to be called
* @has_error_code: Hardware pushed error code on stack
+ * @sane: Sane variant which handles irq tracing, context tracking in C
*
* The macro emits code to set up the kernel context for straight forward
* and simple IDT entries. No IST stack, no paranoid entry checks.
*/
-.macro idtentry vector asmsym cfunc has_error_code:req
+.macro idtentry vector asmsym cfunc has_error_code:req sane=0
SYM_CODE_START(\asmsym)
UNWIND_HINT_IRET_REGS offset=\has_error_code*8
ASM_CLAC
@@ -574,7 +582,7 @@ SYM_CODE_START(\asmsym)
.Lfrom_usermode_no_gap_\@:
.endif
- idtentry_body \vector \cfunc \has_error_code
+ idtentry_body \vector \cfunc \has_error_code \sane
_ASM_NOKPROBE(\asmsym)
SYM_CODE_END(\asmsym)
@@ -1403,6 +1411,14 @@ SYM_CODE_START_LOCAL(error_exit)
jmp .Lretint_user
SYM_CODE_END(error_exit)
+SYM_CODE_START_LOCAL(error_return)
+ UNWIND_HINT_REGS
+ DEBUG_ENTRY_ASSERT_IRQS_OFF
+ testb $3, CS(%rsp)
+ jz restore_regs_and_return_to_kernel
+ jmp swapgs_restore_regs_and_return_to_usermode
+SYM_CODE_END(error_return)
+
/*
* Runs on exception stack. Xen PV does not go through this path at all,
* so we can use real assembly here.
next prev parent reply other threads:[~2020-05-19 20:01 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-05 13:43 [patch V4 part 3 00/29] x86/entry: Entry/exception code rework, simple exceptions Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 01/29] x86/traps: Mark fixup_bad_iret() noinstr Thomas Gleixner
2020-05-09 0:39 ` Andy Lutomirski
2020-05-13 1:51 ` Steven Rostedt
2020-05-14 0:41 ` Mathieu Desnoyers
2020-05-14 1:35 ` Andy Lutomirski
2020-05-11 12:28 ` Masami Hiramatsu
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 02/29] x86/traps: Mark sync_regs() noinstr Thomas Gleixner
2020-05-09 0:39 ` Andy Lutomirski
2020-05-11 12:08 ` Masami Hiramatsu
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 03/29] x86/entry: Disable interrupts for native_load_gs_index() in C code Thomas Gleixner
2020-05-09 0:40 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 04/29] x86/traps: Make interrupt enable/disable symmetric " Thomas Gleixner
2020-05-07 15:25 ` Alexandre Chartre
2020-05-07 17:14 ` Thomas Gleixner
2020-05-09 0:44 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 05/29] x86/traps: Split trap numbers out in a seperate header Thomas Gleixner
2020-05-07 15:34 ` Alexandre Chartre
2020-05-19 19:58 ` [tip: x86/entry] x86/traps: Split trap numbers out in a separate header tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 06/29] x86/entry/64: Reorder idtentries Thomas Gleixner
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 07/29] x86/entry: Distangle idtentry Thomas Gleixner
2020-05-10 20:31 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 08/29] x86/entry/64: Provide sane error entry/exit Thomas Gleixner
2020-05-10 21:02 ` Andy Lutomirski
2020-05-13 2:10 ` Steven Rostedt
2020-05-13 6:35 ` Thomas Gleixner
2020-05-19 19:58 ` tip-bot2 for Thomas Gleixner [this message]
2020-05-05 13:44 ` [patch V4 part 3 09/29] x86/entry/32: Provide macro to emit IDT entry stubs Thomas Gleixner
2020-05-11 0:55 ` Andy Lutomirski
2020-05-14 1:44 ` Mathieu Desnoyers
2020-05-14 4:31 ` Andy Lutomirski
2020-05-14 13:38 ` Mathieu Desnoyers
2020-05-14 14:08 ` Thomas Gleixner
2020-05-14 14:43 ` Mathieu Desnoyers
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 10/29] x86/idtentry: Provide macros to define/declare IDT entry points Thomas Gleixner
2020-05-11 0:58 ` Andy Lutomirski
2020-05-11 10:39 ` Thomas Gleixner
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 11/29] rcu: Provide rcu_irq_exit_preempt() Thomas Gleixner
2020-05-05 22:02 ` Paul E. McKenney
2020-05-05 22:05 ` Thomas Gleixner
2020-05-05 22:24 ` Paul E. McKenney
2020-05-14 1:03 ` Mathieu Desnoyers
2020-05-14 2:41 ` Joel Fernandes
2020-05-14 2:46 ` Joel Fernandes
2020-05-14 14:43 ` Thomas Gleixner
2020-05-15 19:00 ` Joel Fernandes
2020-05-19 19:52 ` [tip: core/rcu] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 12/29] x86/entry/common: Provide idtentry_enter/exit() Thomas Gleixner
2020-05-07 16:27 ` Alexandre Chartre
2020-05-11 4:34 ` Andy Lutomirski
2020-05-11 10:59 ` [patch V5 " Thomas Gleixner
2020-05-11 15:31 ` Andy Lutomirski
2020-05-11 18:42 ` Thomas Gleixner
2020-05-12 16:49 ` [patch V6 " Thomas Gleixner
2020-05-14 0:51 ` Andy Lutomirski
2020-05-14 1:08 ` [patch V4 " Mathieu Desnoyers
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 13/29] x86/traps: Prepare for using DEFINE_IDTENTRY Thomas Gleixner
2020-05-14 4:37 ` Andy Lutomirski
2020-05-14 12:16 ` Thomas Gleixner
2020-05-14 12:33 ` Peter Zijlstra
2020-05-15 13:42 ` Thomas Gleixner
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 14/29] x86/entry: Convert Divide Error to IDTENTRY Thomas Gleixner
2020-05-14 4:38 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-10-11 15:25 ` Dmitry Vyukov
2020-10-11 17:50 ` Thomas Gleixner
2020-10-12 13:19 ` [tip: x86/urgent] x86/traps: Fix #DE Oops message regression tip-bot2 for Thomas Gleixner
2020-10-12 20:30 ` [tip: x86/entry] x86/entry: Convert Divide Error to IDTENTRY Kees Cook
2020-10-13 10:19 ` Dmitry Vyukov
2020-10-13 17:41 ` [tip: x86/urgent] x86/traps: Fix #DE Oops message regression tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 15/29] x86/entry: Convert Overflow exception to IDTENTRY Thomas Gleixner
2020-05-14 4:39 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 16/29] x86/entry: Convert Bounds " Thomas Gleixner
2020-05-14 4:42 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 17/29] x86/entry: Convert Invalid Opcode " Thomas Gleixner
2020-05-14 4:45 ` Andy Lutomirski
2020-05-14 12:33 ` Thomas Gleixner
2020-05-14 15:00 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 18/29] x86/entry: Convert Device not available " Thomas Gleixner
2020-05-14 4:45 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 19/29] x86/entry: Convert Coprocessor segment overrun " Thomas Gleixner
2020-05-14 4:46 ` Andy Lutomirski
2020-05-05 13:44 ` [patch V4 part 3 20/29] x86/entry: Provide IDTENTRY_ERRORCODE Thomas Gleixner
2020-05-14 4:46 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] x86/idtentry: " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 21/29] x86/entry: Convert Invalid TSS exception to IDTENTRY Thomas Gleixner
2020-05-14 4:48 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 22/29] x86/entry: Convert Segment not present " Thomas Gleixner
2020-05-14 4:47 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 23/29] x86/entry: Convert Stack segment " Thomas Gleixner
2020-05-14 4:49 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 24/29] x86/entry: Convert General protection " Thomas Gleixner
2020-05-14 4:50 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 25/29] x86/entry: Convert Spurious interrupt bug " Thomas Gleixner
2020-05-14 4:47 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 26/29] x86/entry: Convert Coprocessor error " Thomas Gleixner
2020-05-14 4:49 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-19 19:58 ` [tip: x86/entry] x86/entry: Convert Coprocessor segment overrun " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 27/29] x86/entry: Convert Alignment check " Thomas Gleixner
2020-05-14 4:50 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 28/29] x86/entry: Convert SIMD coprocessor error " Thomas Gleixner
2020-05-14 4:56 ` Andy Lutomirski
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 29/29] x86/entry/32: Convert IRET exception to IDTENTRY_SW Thomas Gleixner
2020-05-07 16:47 ` Alexandre Chartre
2020-05-14 4:54 ` Andy Lutomirski
2020-05-15 14:11 ` Thomas Gleixner
2020-05-19 19:58 ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
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