From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<broonie@kernel.org>, <robh+dt@kernel.org>, <lukas@wunner.de>
Cc: <skomatineni@nvidia.com>, <linux-spi@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>
Subject: [PATCH v2 5/9] spi: spi-mem: Allow masters to transfer dummy cycles directly by hardware
Date: Fri, 11 Dec 2020 09:01:24 -0800 [thread overview]
Message-ID: <1607706088-1437-8-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1607706088-1437-1-git-send-email-skomatineni@nvidia.com>
This patch adds a flag SPI_MASTER_USES_HW_DUMMY_CYCLES for the controllers
that support transfer of dummy cycles by the hardware directly.
For controller with this flag set, spi-mem driver will skip dummy bytes
transfer in the spi message.
Controller drivers can get the number of dummy cycles from spi_message.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
drivers/spi/spi-mem.c | 18 +++++++++++-------
include/linux/spi/spi.h | 8 ++++++++
2 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index f3a3f19..38a523b 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -350,13 +350,17 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
}
if (op->dummy.nbytes) {
- memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
- xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
- xfers[xferpos].len = op->dummy.nbytes;
- xfers[xferpos].tx_nbits = op->dummy.buswidth;
- spi_message_add_tail(&xfers[xferpos], &msg);
- xferpos++;
- totalxferlen += op->dummy.nbytes;
+ if (ctlr->flags & SPI_MASTER_USES_HW_DUMMY_CYCLES) {
+ msg.dummy_cycles = (op->dummy.nbytes * 8) / op->dummy.buswidth;
+ } else {
+ memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
+ xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
+ xfers[xferpos].len = op->dummy.nbytes;
+ xfers[xferpos].tx_nbits = op->dummy.buswidth;
+ spi_message_add_tail(&xfers[xferpos], &msg);
+ xferpos++;
+ totalxferlen += op->dummy.nbytes;
+ }
}
if (op->data.nbytes) {
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index aa09fdc..2024149 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -512,6 +512,8 @@ struct spi_controller {
#define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
+#define SPI_MASTER_USES_HW_DUMMY_CYCLES BIT(6) /* HW dummy bytes transfer */
+
/* flag indicating this is an SPI slave controller */
bool slave;
@@ -1022,6 +1024,12 @@ struct spi_message {
unsigned actual_length;
int status;
+ /*
+ * dummy cycles in the message transfer. This is used by the controller
+ * drivers supports transfer of dummy cycles directly by the hardware.
+ */
+ u8 dummy_cycles;
+
/* for optional use by whatever driver currently owns the
* spi_message ... between calls to spi_async and then later
* complete(), that's the spi_controller controller driver.
--
2.7.4
next prev parent reply other threads:[~2020-12-11 18:29 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-11 17:01 [PATCH v2 0/9] Add Tegra Quad SPI driver Sowjanya Komatineni
2020-12-11 17:01 ` [PATCH v2 1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM Sowjanya Komatineni
2020-12-11 17:01 ` [PATCH v2 2/9] dt-bindings: spi: Add Tegra QSPI device tree binding Sowjanya Komatineni
2020-12-11 20:55 ` Rob Herring
2020-12-11 17:01 ` [PATCH v2 2/9] dt-bindings: spi: Add Tegra Quad SPI " Sowjanya Komatineni
2020-12-11 20:56 ` Rob Herring
2020-12-11 21:07 ` Sowjanya Komatineni
2020-12-11 17:01 ` [PATCH v2 3/9] MAINTAINERS: Add Tegra QSPI driver section Sowjanya Komatineni
2020-12-11 17:01 ` [PATCH v2 3/9] MAINTAINERS: Add Tegra Quad SPI " Sowjanya Komatineni
2020-12-11 17:01 ` [PATCH v2 4/9] spi: tegra210-quad: Add support for Tegra210 QSPI controller Sowjanya Komatineni
2020-12-11 17:01 ` Sowjanya Komatineni [this message]
2020-12-11 18:33 ` [PATCH v2 5/9] spi: spi-mem: Allow masters to transfer dummy cycles directly by hardware Mark Brown
2020-12-11 21:06 ` Sowjanya Komatineni
2020-12-11 17:01 ` [PATCH v2 6/9] spi: tegra210-quad: Add support for hardware dummy cycles Sowjanya Komatineni
2020-12-11 17:01 ` [PATCH v2 7/9] arm64: tegra: Enable QSPI on Jetson Nano Sowjanya Komatineni
2020-12-11 17:01 ` [PATCH v2 8/9] arm64: tegra: Add QSPI nodes on Tegra194 Sowjanya Komatineni
2020-12-11 17:01 ` [PATCH v2 9/9] arm64: tegra: Enable QSPI on Jetson Xavier NX Sowjanya Komatineni
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