Hi, this patch fixes all ACPI problems on the nforce2 chipset for me. 

Here is the feature list:

1) Make IO-APIC use correct polarity/mode settings from ACPI.

2) Detect  buggy ACPI code when setting IRQ routing -- warn the user and 
attempt to fallback to non-ACPI configuration.

3) Add /proc/irq/io_apic so that the contents of the IO-APIC can be seen on a 
live system.

4) Fix potential problem in pci_link.c

The current ACPI code does this:
a) Scan for all PCI Link devices
b) Allocate an IRQ to each link device.
c) Setup PCI Routing table entries.

This is error-prone. In my BIOS, there is one set of Link devices for PIC mode 
and one set for APIC mode. In the AML code however, they both talk to the 
*same* hardware on the board.

So by luck, the PIC-mode link devices are set up first, then the APIC ones. If 
this order was reversed, the IRQs in APIC mode would be completely wrong.

This patch changes the code so that it only allocates IRQs to link devices 
while setting up the PCI routing table entries, so only the PIC or APIC ones 
will be set up as appropriate. 

5) Boot-enabled IRQs cannot be relied upon.

Although the _CRS method in my ACPI does return the correct IRQ, this is NOT 
necessarily what the hardware is set to. The patch forces every link device 
IRQ to be set at least once.

This _may_ break ACPI IRQ routing on the Toshiba 5005-S504  (I hope I have 
managed to support it though). Can someone check please? Quote from 
pci_link.c:
         * Note that we don't validate that the current IRQ (_CRS) exists
         * within the possible IRQs (_PRS): we blindly assume that whatever
         * IRQ a boot-enabled Link device is set to is the correct one.
         * (Required to support systems such as the Toshiba 5005-S504.)