From: Will Deacon <will.deacon@arm.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: "linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"arnd@arndb.de" <arnd@arndb.de>,
"monstr@monstr.eu" <monstr@monstr.eu>,
"dhowells@redhat.com" <dhowells@redhat.com>,
"broonie@linaro.org" <broonie@linaro.org>,
"peterz@infradead.org" <peterz@infradead.org>,
"paulmck@linux.vnet.ibm.com" <paulmck@linux.vnet.ibm.com>
Subject: Re: [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors
Date: Tue, 27 May 2014 21:32:49 +0100 [thread overview]
Message-ID: <20140527203249.GB31850@arm.com> (raw)
In-Reply-To: <1401222098.20915.77.camel@pasglop>
On Tue, May 27, 2014 at 09:21:38PM +0100, Benjamin Herrenschmidt wrote:
> On Tue, 2014-05-27 at 20:32 +0100, Will Deacon wrote:
>
> > Why would you need two barriers? I would have though an mmiowb() inlined
> > into writel after the store operation would be sufficient. Or is this to
> > ensure a non-relaxed write is ordered with respect to a relaxed write?
>
> Well, so the non-relaxed writel would have to do:
>
> sync
> store
> sync
>
> The first sync is to synchronize with DMAs, so that a sequence of
>
> store to mem
> writel
>
> Remains ordered vs. the device (ie, when the writel causes the device
> to do a DMA, it will see the previous store to mem).
>
> The second sync is needed as mmiowb, to order with unlocks.
Ah yeah, thanks. I was so hung up on the ordering against locks that I
completely forgot about DMA!
> At this point, I'm keen on keeping my per-cpu trick to avoid that
> second one in most cases.
Makes sense. The alternative is dropping that requirement and instead
relying on drivers to use mmiowb() even with the non-relaxed accessors,
but I think that's going to be fairly painful (and hence why you have the
trick to start with).
Will
next prev parent reply other threads:[~2014-05-27 20:33 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-22 16:47 [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors Will Deacon
2014-05-22 16:47 ` [PATCH v2 01/18] asm-generic: io: implement relaxed accessor macros as conditional wrappers Will Deacon
2014-05-22 16:47 ` [PATCH v2 02/18] microblaze: io: remove dummy relaxed accessor macros Will Deacon
2014-05-22 16:47 ` [PATCH v2 03/18] s390: io: remove dummy relaxed accessor macros for reads Will Deacon
2014-05-22 16:47 ` [PATCH v2 04/18] xtensa: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 05/18] alpha: io: implement relaxed accessor macros for writes Will Deacon
2014-05-22 18:15 ` Richard Henderson
2014-05-22 16:47 ` [PATCH v2 06/18] frv: io: implement dummy " Will Deacon
2014-05-22 16:47 ` [PATCH v2 07/18] cris: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 08/18] ia64: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 09/18] m32r: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 10/18] m68k: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 11/18] mn10300: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 12/18] parisc: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 13/18] powerpc: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 14/18] sparc: " Will Deacon
2014-05-22 18:18 ` Sam Ravnborg
2014-05-23 14:38 ` Will Deacon
2014-05-30 0:10 ` David Miller
2014-05-22 16:47 ` [PATCH v2 15/18] tile: " Will Deacon
2014-05-22 16:47 ` [PATCH v2 16/18] x86: " Will Deacon
2014-05-22 17:15 ` H. Peter Anvin
2014-05-23 14:46 ` Will Deacon
2014-05-23 14:53 ` H. Peter Anvin
2014-05-23 14:57 ` Will Deacon
2014-05-23 15:20 ` H. Peter Anvin
2014-05-23 15:34 ` Will Deacon
2014-05-23 15:43 ` H. Peter Anvin
2014-05-23 15:56 ` Peter Zijlstra
2014-05-23 16:12 ` H. Peter Anvin
2014-05-23 16:21 ` Peter Zijlstra
2014-05-23 16:31 ` Geert Uytterhoeven
2014-05-23 16:35 ` H. Peter Anvin
2014-05-22 16:47 ` [PATCH v2 17/18] documentation: memory-barriers: clarify relaxed io accessor semantics Will Deacon
2014-05-22 16:47 ` [PATCH v2 18/18] asm-generic: io: define relaxed accessor macros unconditionally Will Deacon
2014-05-25 21:46 ` [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO accessors Benjamin Herrenschmidt
2014-05-27 19:32 ` Will Deacon
2014-05-27 20:21 ` Benjamin Herrenschmidt
2014-05-27 20:32 ` Will Deacon [this message]
2014-05-25 21:47 ` Benjamin Herrenschmidt
2014-05-27 19:34 ` Will Deacon
2014-05-27 20:23 ` Benjamin Herrenschmidt
2014-05-27 20:34 ` Will Deacon
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