Re: Using irq-crossbar.c

From: Marc Zyngier <marc.zyngier@arm.com>
To: Mason <slash.tmp@free.fr>
Cc: Sebastian Frias <sf84@laposte.net>,
	Thomas Gleixner <tglx@linutronix.de>,
	LKML <linux-kernel@vger.kernel.org>,
	Grygorii Strashko <grygorii.strashko@ti.com>,
	Sricharan R <r.sricharan@ti.com>, Mans Rullgard <mans@mansr.com>
Subject: Re: Using irq-crossbar.c
Date: Sat, 11 Jun 2016 10:58:40 +0100	[thread overview]
Message-ID: <20160611105840.69324f8e@arm.com> (raw)
In-Reply-To: <575B16BD.50600@free.fr>

On Fri, 10 Jun 2016 21:36:29 +0200
Mason <slash.tmp@free.fr> wrote:

> On 10/06/2016 18:05, Marc Zyngier wrote:
> 
> > On 10/06/16 16:37, Sebastian Frias wrote:
> >
> >> here's the diff on our DT:
> >>
> >> --- tango4-common.dtsi	2016-06-10 16:23:08.244246017 +0200
> >> +++ tangox_irqv2-common.dtsi	2016-06-10 16:24:01.212588737 +0200
> >> @@ -47,7 +47,7 @@
> >>  
> >>  	soc {
> >>  		compatible = "simple-bus";
> >> -		interrupt-parent = <&irq0>;
> >> +		interrupt-parent = <&irq_mux>;
> >>  		#address-cells = <1>;
> >>  		#size-cells = <1>;
> >>  		ranges;
> >> @@ -75,7 +75,7 @@
> >>  		uart: serial@10700 {
> >>  			compatible = "ralink,rt2880-uart";
> >>  			reg = <0x10700 0x30>;
> >> -			interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
> >> +			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
> >>  			clock-frequency = <7372800>;
> >>  			reg-shift = <2>;
> >>  		};
> >> @@ -83,10 +83,11 @@
> >>  		eth0: ethernet@26000 {
> >>  			compatible = "sigma,smp8734-ethernet";
> >>  			reg = <0x26000 0x800>;
> >> -			interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
> >> +			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
> >>  			clocks = <&clkgen 1>;
> >>  		};
> >>  
> >> +#if 0
> >>  		intc: interrupt-controller@6e000 {
> >>  			compatible = "sigma,smp8642-intc";
> >>  			reg = <0x6e000 0x400>;
> >> @@ -117,5 +118,16 @@
> >>  				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> >>  			};
> >>  		};
> >> +#else
> >> +		irq_mux: irq_mux@6f800 {
> >> +			 compatible = "sigma,smp-irq-mux";
> >> +			 reg = <0x6f800 0x400>;
> >> +			 interrupt-controller;
> >> +			 interrupt-parent = <&gic>;
> >> +			 irqs-reserved = <2 3 4 125 126 127>;
> >> +		};
> > 
> > Where is the GIC? Where is the #interrupt-cells property? What is the
> > interrupt parent for the GIC itself? (and I'm tempted to add "What is
> > your name? What is you quest?", but that's because it is Friday and I
> > feel like I need a beer...).
> 
> Beer and cheese? Beurk! ;-)

I don't think you've ever tried (or at least, not with proper cheese
and/or beer).

> I think Sebastian is even more baffled by the DT mess
> (sorry, intricacies) than I am.

This mess is what has saved us from the apocalypse 5 years ago, and
describing a complex system is not easy (what a surprise...). If you
just want to apply recipes without understanding the underlying
constraints, you're in for a lot of pain.

> The base file he was referring to is:
> 
> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/tango4-common.dtsi

I know which file that is, it is mentioned in the diff. I was merely
trying to point out the glaring mistakes that could be enough for a
interrupt controller hierarchy to be completely non-functional:

- Your crossbar doesn't have a #interrupt-cells property. How do you
  expect the interrupt specifiers to be interpreted?
- You've changed the default interrupt controller to be your crossbar.
  Which means that all the sub-nodes are inheriting it. Have you
  checked that this was valid for all of these nodes?

And as it has been pointed out before, you seem to be reusing an
existing driver. Do you know for sure that the usage constraints are
similar?

	M.
-- 
Jazz is not dead. It just smells funny.