From: Rob Herring <robh@kernel.org>
To: Ryder Lee <ryder.lee@mediatek.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [PATCH 2/2] dt-bindings: phy: Add documentation for Mediatek PCIe PHY
Date: Fri, 28 Apr 2017 12:52:00 -0500 [thread overview]
Message-ID: <20170428175200.laakck7ill2lxtxc@rob-hp-laptop> (raw)
In-Reply-To: <1492935453-17373-3-git-send-email-ryder.lee@mediatek.com>
On Sun, Apr 23, 2017 at 04:17:33PM +0800, Ryder Lee wrote:
> Add documentation for PCIe PHY available in MT7623 series SoCs.
>
> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
> ---
> .../devicetree/bindings/phy/phy-mt7623-pcie.txt | 67 ++++++++++++++++++++++
> 1 file changed, 67 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt b/Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt
> new file mode 100644
> index 0000000..27a9253
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt
> @@ -0,0 +1,67 @@
> +Mediatek MT7623 PCIe PHY
> +-----------------------
> +
> +Required properties:
> + - compatible: Should contain "mediatek,mt7623-pcie-phy"
> + - #phy-cells: must be 0
> + - clocks: Must contain an entry in clock-names.
> + See ../clocks/clock-bindings.txt for details.
> + - clock-names: Must be "refclk"
> + - resets: Must contain an entry in reset-names.
> + See ../reset/reset.txt for details.
> + - reset-names: Must be "phy"
> +
> +Optional properties:
> + - phy-switch: The PHY on PCIe port2 is shared with USB u3phy2. If you
> + want to enable port2, you should contain it.
Need to state what the value is (i.e. a phandle to ?). Also needs a
vendor prefix.
> +
> +Example:
> +
> + pcie0_phy: pciephy@1a149000 {
pcie-phy@...
> + compatible = "mediatek,mt7623-pcie-phy";
> + reg = <0 0x1a149000 0 0x1000>;
> + clocks = <&clk26m>;
> + clock-names = "pciephya_ref";
> + #phy-cells = <0>;
> + status = "disabled";
Don't show status in examples.
> + };
> +
> + pcie1_phy: pciephy@1a14a000 {
> + compatible = "mediatek,mt7623-pcie-phy";
> + reg = <0 0x1a14a000 0 0x1000>;
> + clocks = <&clk26m>;
> + clock-names = "pciephya_ref";
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> +
> + pcie2_phy: pciephy@1a244000 {
> + compatible = "mediatek,mt7623-pcie-phy";
> + reg = <0 0x1a244000 0 0x1000>;
> + clocks = <&clk26m>;
> + clock-names = "pciephya_ref";
> + #phy-cells = <0>;
> +
> + phy-switch = <&hifsys>;
> + status = "disabled";
> + };
> +
> +Specifying phy control of devices
> +---------------------------------
> +
> +Device nodes should specify the configuration required in their "phys"
> +property, containing a phandle to the phy node and phy-names.
> +
> +Example:
> +
> +#include <dt-bindings/phy/phy.h>
> +
> +pcie: pcie@1a140000 {
> + ...
> + pcie@1,0 {
> + ...
> + phys = <&pcie0_phy>;
> + phy-names = "pcie-phy0";
> + }
> + ...
> +};
> --
> 1.9.1
>
next prev parent reply other threads:[~2017-04-28 17:52 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-23 8:17 [PATCH 0/2] Add PCIe phy driver for some Mediatek SoCs Ryder Lee
2017-04-23 8:17 ` [PATCH 1/2] phy: add PCIe phy driver for mt7623 SoCs families Ryder Lee
2017-04-23 8:17 ` [PATCH 2/2] dt-bindings: phy: Add documentation for Mediatek PCIe PHY Ryder Lee
2017-04-28 17:52 ` Rob Herring [this message]
2017-05-02 7:08 ` Ryder Lee
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