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From: Heikki Krogerus <heikki.krogerus@linux.intel.com>
To: sathyanarayanan.kuppuswamy@linux.intel.com
Cc: gnurou@gmail.com, gregkh@linuxfoundation.org,
	linus.walleij@linaro.org, edubezval@gmail.com,
	dvhart@infradead.org, rui.zhang@intel.com, lee.jones@linaro.org,
	andy@infradead.org, platform-driver-x86@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-usb@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	sathyaosid@gmail.com
Subject: Re: [PATCH v6 5/6] mfd: intel_soc_pmic_bxtwc: Use chained IRQs for second level IRQ chips
Date: Tue, 6 Jun 2017 12:29:03 +0300	[thread overview]
Message-ID: <20170606092903.GK26659@kuha.fi.intel.com> (raw)
In-Reply-To: <9881880e5aac28a53398b40db468c704763e941a.1496687716.git.sathyanarayanan.kuppuswamy@linux.intel.com>

On Mon, Jun 05, 2017 at 12:08:05PM -0700, sathyanarayanan.kuppuswamy@linux.intel.com wrote:
> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> 
> Whishkey cove PMIC has support to mask/unmask interrupts at two levels.
> At first level we can mask/unmask interrupt domains like TMU, GPIO, ADC,
> CHGR, BCU THERMAL and PWRBTN and at second level, it provides facility
> to mask/unmask individual interrupts belong each of this domain. For
> example, in case of TMU, at first level we have TMU interrupt domain,
> and at second level we have two interrupts, wake alarm, system alarm that
> belong to the TMU interrupt domain.
> 
> Currently, in this driver all first level IRQs are registered as part of
> IRQ chip(bxtwc_regmap_irq_chip). By default, after you register the IRQ
> chip from your driver, all IRQs in that chip will masked and can only be
> enabled if that IRQ is requested using request_irq() call. This is the
> default Linux IRQ behavior model. And whenever a dependent device that
> belongs to PMIC requests only the second level IRQ and not explicitly
> unmask the first level IRQ, then in essence the second level IRQ will
> still be disabled. For example, if TMU device driver request wake_alarm
> IRQ and not explicitly unmask TMU level 1 IRQ then according to the default
> Linux IRQ model,  wake_alarm IRQ will still be disabled. So the proper
> solution to fix this issue is to use the chained IRQ chip concept. We
> should chain all the second level chip IRQs to the corresponding first
> level IRQ. To do this, we need to create separate IRQ chips for every
> group of second level IRQs.
> 
> In case of TMU, when adding second level IRQ chip, instead of using PMIC
> IRQ we should use the corresponding first level IRQ. So the following
> code will change from
> 
> ret = regmap_add_irq_chip(pmic->regmap, pmic->irq, ...)
> 
> to,
> 
> virq = regmap_irq_get_virq(&pmic->irq_chip_data, BXTWC_TMU_LVL1_IRQ);
> 
> ret = regmap_add_irq_chip(pmic->regmap, virq, ...)
> 
> In case of Whiskey Cove Type-C driver, Since USBC IRQ is moved under
> charger level2 IRQ chip. We should use charger IRQ chip(irq_chip_data_chgr)
> to get the USBC virtual IRQ number.
> 
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>

For the typec_wcove.c part:

Revieved-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>


Thanks,

-- 
heikki

  reply	other threads:[~2017-06-06  9:31 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-14 23:25 [PATCH v2 1/8] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index sathyanarayanan.kuppuswamy
2017-04-14 23:25 ` [PATCH v2 2/8] mfd: intel_soc_pmic_bxtwc: remove thermal second level irqs sathyanarayanan.kuppuswamy
2017-04-14 23:25 ` [PATCH v2 3/8] thermal: intel_bxt_pmic_thermal: use first level PMIC thermal irq sathyanarayanan.kuppuswamy
2017-05-22 10:17   ` Lee Jones
2017-05-22 19:08     ` sathyanarayanan kuppuswamy
2017-05-23  6:24   ` Zhang Rui
2017-05-23  7:26     ` Lee Jones
2017-05-23 17:29       ` [PATCH v3 1/8] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index sathyanarayanan.kuppuswamy
2017-05-23 17:30         ` [PATCH v3 2/8] mfd: intel_soc_pmic_bxtwc: remove thermal second level irqs sathyanarayanan.kuppuswamy
2017-05-23 17:30         ` [PATCH v3 3/8] thermal: intel_bxt_pmic_thermal: use first level PMIC thermal irq sathyanarayanan.kuppuswamy
2017-05-23 17:30         ` [PATCH v3 4/8] mfd: intel_soc_pmic_bxtwc: remove second level irq for gpio device sathyanarayanan.kuppuswamy
2017-05-23 17:30         ` [PATCH v3 5/8] gpio: gpio-wcove: use first level PMIC GPIO irq sathyanarayanan.kuppuswamy
2017-05-23 17:30         ` [PATCH v3 6/8] mfd: intel_soc_pmic_bxtwc: utilize devm_* functions in driver probe sathyanarayanan.kuppuswamy
2017-05-23 17:30         ` [PATCH v3 7/8] mfd: intel_soc_pmic_bxtwc: use chained irqs for second level irq chips sathyanarayanan.kuppuswamy
2017-05-23 17:30         ` [PATCH v3 8/8] platform: x86: intel_bxtwc_tmu: remove first level irq unmask sathyanarayanan.kuppuswamy
2017-05-30  8:53         ` [GIT PULL] Immutable branch between MFD, GPIO, Thermal and X86 due for the v4.13 merge window Lee Jones
2017-05-31  3:38           ` Stephen Rothwell
2017-05-31  4:27             ` Sathyanarayanan Kuppuswamy Natarajan
2017-05-31  4:29             ` Sathyanarayanan Kuppuswamy Natarajan
2017-05-31  6:57               ` Lee Jones
2017-05-31 22:33                 ` sathyanarayanan kuppuswamy
2017-06-03 17:01                   ` Darren Hart
2017-05-31  6:50             ` Lee Jones
2017-05-31  7:02           ` Lee Jones
2017-05-31 22:37             ` [PATCH v5 0/8] mfd: intel_soc_pmic_bxtwc: Add chained IRQ support sathyanarayanan.kuppuswamy
2017-05-31 22:37               ` [PATCH v5 1/8] mfd: intel_soc_pmic_bxtwc: Fix TMU interrupt index sathyanarayanan.kuppuswamy
2017-05-31 22:37               ` [PATCH v5 2/8] mfd: intel_soc_pmic_bxtwc: Remove thermal second level irqs sathyanarayanan.kuppuswamy
2017-05-31 22:37               ` [PATCH v5 3/8] thermal: intel_bxt_pmic_thermal: Use first level PMIC thermal irq sathyanarayanan.kuppuswamy
2017-06-03 13:00                 ` Andy Shevchenko
2017-06-03 17:28                   ` Sathyanarayanan Kuppuswamy Natarajan
2017-06-03 17:32                     ` Andy Shevchenko
2017-06-03 17:53                       ` Sathyanarayanan Kuppuswamy Natarajan
2017-06-03 18:18                         ` Andy Shevchenko
2017-06-05 19:08                           ` [PATCH v6 0/6] mfd: intel_soc_pmic_bxtwc: Add chained IRQ support sathyanarayanan.kuppuswamy
2017-06-05 19:08                             ` [PATCH v6 1/6] mfd: intel_soc_pmic_bxtwc: Fix TMU interrupt index sathyanarayanan.kuppuswamy
2017-06-05 19:08                             ` [PATCH v6 2/6] mfd: intel_soc_pmic_bxtwc: Remove thermal second level IRQs sathyanarayanan.kuppuswamy
2017-06-05 19:08                             ` [PATCH v6 3/6] mfd: intel_soc_pmic_bxtwc: Remove second level IRQ for gpio device sathyanarayanan.kuppuswamy
2017-06-05 19:08                             ` [PATCH v6 4/6] mfd: intel_soc_pmic_bxtwc: Utilize devm_* functions in driver probe sathyanarayanan.kuppuswamy
2017-06-05 19:08                             ` [PATCH v6 5/6] mfd: intel_soc_pmic_bxtwc: Use chained IRQs for second level IRQ chips sathyanarayanan.kuppuswamy
2017-06-06  9:29                               ` Heikki Krogerus [this message]
2017-06-05 19:08                             ` [PATCH v6 6/6] platform/x86: intel_bxtwc_tmu: Remove first level IRQ unmask sathyanarayanan.kuppuswamy
2017-06-06  9:36                             ` [PATCH v6 0/6] mfd: intel_soc_pmic_bxtwc: Add chained IRQ support Andy Shevchenko
2017-06-19 14:48                             ` [GIT PULL] Immutable branch between MFD and X86 due for the v4.13 merge window Lee Jones
2017-06-19 15:08                               ` Andy Shevchenko
2017-06-19 19:54                                 ` Darren Hart
2017-05-31 22:37               ` [PATCH v5 4/8] mfd: intel_soc_pmic_bxtwc: Remove second level irq for gpio device sathyanarayanan.kuppuswamy
2017-05-31 22:37               ` [PATCH v5 5/8] gpio: gpio-wcove: Use first level PMIC GPIO irq sathyanarayanan.kuppuswamy
2017-06-03 13:01                 ` Andy Shevchenko
2017-05-31 22:37               ` [PATCH v5 6/8] mfd: intel_soc_pmic_bxtwc: Utilize devm_* functions in driver probe sathyanarayanan.kuppuswamy
2017-06-03 13:03                 ` Andy Shevchenko
2017-05-31 22:37               ` [PATCH v5 7/8] mfd: intel_soc_pmic_bxtwc: Use chained irqs for second level irq chips sathyanarayanan.kuppuswamy
2017-06-03 13:26                 ` Andy Shevchenko
2017-05-31 22:37               ` [PATCH v5 8/8] platform/x86: intel_bxtwc_tmu: Remove first level irq unmask sathyanarayanan.kuppuswamy
2017-06-03 13:27               ` [PATCH v5 0/8] mfd: intel_soc_pmic_bxtwc: Add chained IRQ support Andy Shevchenko
2017-04-14 23:25 ` [PATCH v2 4/8] mfd: intel_soc_pmic_bxtwc: remove second level irq for gpio device sathyanarayanan.kuppuswamy
2017-04-14 23:25 ` [PATCH v2 5/8] gpio: gpio-wcove: use first level PMIC GPIO irq sathyanarayanan.kuppuswamy
2017-04-24 13:17   ` Linus Walleij
2017-04-26 15:40     ` Andy Shevchenko
2017-04-14 23:25 ` [PATCH v2 6/8] mfd: intel_soc_pmic_bxtwc: utilize devm_* functions in driver probe sathyanarayanan.kuppuswamy
2017-04-24 12:03   ` Lee Jones
2017-04-14 23:25 ` [PATCH v2 7/8] mfd: intel_soc_pmic_bxtwc: use chained irqs for second level irq chips sathyanarayanan.kuppuswamy
2017-04-24 12:04   ` Lee Jones
2017-04-14 23:26 ` [PATCH v2 8/8] platform: x86: intel_bxtwc_tmu: remove first level irq unmask sathyanarayanan.kuppuswamy
2017-04-21 22:00   ` Darren Hart
2017-04-21 22:34     ` sathyanarayanan kuppuswamy
2017-04-22  2:52       ` Andy Shevchenko
2017-04-24  9:24         ` Lee Jones
2017-04-24  9:44           ` Andy Shevchenko
2017-04-24 12:24             ` Lee Jones
2017-04-26 15:44               ` Andy Shevchenko
2017-04-24  9:26     ` Lee Jones
2017-05-30  8:54 ` [PATCH v2 1/8] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index Lee Jones
2017-05-30 18:00   ` sathyanarayanan kuppuswamy

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