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From: Greg KH <gregkh@linuxfoundation.org>
To: Lynn Lei <lynnl.wit@gmail.com>
Cc: sudipm.mukherjee@gmail.com, devel@driverdev.osuosl.org,
	linux-fbdev@vger.kernel.org, teddy.wang@siliconmotion.com,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] staging: sm750fb: refactor the clock frequency calculation method
Date: Mon, 3 Jul 2017 08:21:52 +0200	[thread overview]
Message-ID: <20170703062152.GC13523@kroah.com> (raw)
In-Reply-To: <20170702122426.GA17561@lynnl.wit>

On Sun, Jul 02, 2017 at 08:24:26PM +0800, Lynn Lei wrote:
> speed up calculation by merging two divisions into one.

How much did you speed it up?  Please provide proof of anything like
this if you say it is a speed up.

> 
> Signed-off-by: Lynn Lei <lynnl.wit@gmail.com>
> ---
>  drivers/staging/sm750fb/ddk750_chip.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
> index c51761221131..5970c3792f27 100644
> --- a/drivers/staging/sm750fb/ddk750_chip.c
> +++ b/drivers/staging/sm750fb/ddk750_chip.c
> @@ -44,7 +44,7 @@ static unsigned int get_mxclk_freq(void)
>  	OD = (pll_reg & PLL_CTRL_OD_MASK) >> PLL_CTRL_OD_SHIFT;
>  	POD = (pll_reg & PLL_CTRL_POD_MASK) >> PLL_CTRL_POD_SHIFT;
>  
> -	return DEFAULT_INPUT_CLOCK * M / N / (1 << OD) / (1 << POD);
> +	return DEFAULT_INPUT_CLOCK * M / N / (1 << (OD + POD));

Are you sure that gcc didn't already do this for you?  It's a constant
number, I doubt this did anything at all.

thanks,

greg k-h

      reply	other threads:[~2017-07-03  6:21 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-02 12:24 [PATCH] staging: sm750fb: refactor the clock frequency calculation method Lynn Lei
2017-07-03  6:21 ` Greg KH [this message]

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