From: Icenowy Zheng <icenowy@aosc.io>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-sunxi@googlegroups.com, Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH v2 09/10] arm64: allwinner: a64: add DE2 CCU for A64 SoC
Date: Fri, 27 Oct 2017 23:06:57 +0800 [thread overview]
Message-ID: <20171027150658.18509-10-icenowy@aosc.io> (raw)
In-Reply-To: <20171027150658.18509-1-icenowy@aosc.io>
The A64 SoC features a DE2 CCU like the one in H5, but needs to claim a
section of SRAM (SRAM C) to be accessed.
Adds the device tree nodes for the SRAM controller and the DE2 CCU.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 34 +++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 062040ec2fed..03a46da0f0fa 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -130,6 +130,40 @@
#size-cells = <1>;
ranges;
+ display_clocks: clock@1000000 {
+ compatible = "allwinner,sun50i-a64-de2-clk";
+ reg = <0x01000000 0x100000>;
+ clocks = <&ccu CLK_DE>,
+ <&ccu CLK_BUS_DE>;
+ clock-names = "mod",
+ "bus";
+ resets = <&ccu RST_BUS_DE>;
+ allwinner,sram = <&de2_sram>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ sram-controller@1c00000 {
+ compatible = "allwinner,sun50i-a64-sram-controller";
+ reg = <0x01c00000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_c: sram@18000 {
+ compatible = "mmio-sram";
+ reg = <0x00018000 0x28000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00018000 0x28000>;
+
+ de2_sram: sram-section@0 {
+ compatible = "allwinner,sun50i-a64-sram-c";
+ reg = <0x0000 0x28000>;
+ };
+ };
+ };
+
syscon: syscon@1c00000 {
compatible = "allwinner,sun50i-a64-system-controller",
"syscon";
--
2.13.6
next prev parent reply other threads:[~2017-10-27 15:10 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-27 15:06 [PATCH v2 00/10] Allwinner H3/H5/A64(DE2) SimpleFB support Icenowy Zheng
2017-10-27 15:06 ` [PATCH v2 01/10] dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3 Icenowy Zheng
2017-11-01 21:12 ` Rob Herring
2017-10-27 15:06 ` [PATCH v2 02/10] clk: sunxi-ng: add support for Allwinner H3 DE2 CCU Icenowy Zheng
2017-10-27 15:06 ` [PATCH v2 03/10] clk: sunxi-ng: fix the A64/H5 clock description of " Icenowy Zheng
2017-10-27 15:06 ` [PATCH v2 04/10] dt-bindings: simplefb-sunxi: add pipelines for DE2 Icenowy Zheng
2017-10-27 15:06 ` [PATCH v2 05/10] ARM: sun8i: h3/h5: add DE2 CCU device node for H3 Icenowy Zheng
2017-10-27 15:06 ` [PATCH v2 06/10] arm64: allwinner: h5: add compatible string for DE2 CCU Icenowy Zheng
2017-10-27 15:06 ` [PATCH v2 07/10] ARM: sunxi: h3/h5: add simplefb nodes Icenowy Zheng
2017-10-27 15:06 ` [PATCH v2 08/10] dt-bindings: add binding for A64 DE2 CCU SRAM Icenowy Zheng
2017-11-01 21:11 ` Rob Herring
2017-10-27 15:06 ` Icenowy Zheng [this message]
2017-10-27 15:06 ` [PATCH v2 10/10] arm64: allwinner: a64: add simplefb for A64 SoC Icenowy Zheng
2017-10-30 10:44 ` [PATCH v2 00/10] Allwinner H3/H5/A64(DE2) SimpleFB support icenowy
2017-11-02 8:51 ` Icenowy Zheng
2017-11-02 15:44 ` Maxime Ripard
2017-11-06 8:40 ` Daniel Vetter
[not found] ` <CAP03XerMhdOYL08ED7=rt99BZ=RpXLhz_EySUhrJ4HbjYTX93g@mail.gmail.com>
2017-11-09 12:15 ` [linux-sunxi] " Maxime Ripard
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