From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: Lu Baolu <baolu.lu@linux.intel.com>
Cc: iommu@lists.linux-foundation.org,
LKML <linux-kernel@vger.kernel.org>,
Joerg Roedel <joro@8bytes.org>,
David Woodhouse <dwmw2@infradead.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Alex Williamson <alex.williamson@redhat.com>,
Jean-Philippe Brucker <jean-philippe.brucker@arm.com>,
Rafael Wysocki <rafael.j.wysocki@intel.com>,
"Liu, Yi L" <yi.l.liu@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
Raj Ashok <ashok.raj@intel.com>,
Jean Delvare <khali@linux-fr.org>,
Christoph Hellwig <hch@infradead.org>,
jacob.jun.pan@linux.intel.com
Subject: Re: [PATCH v5 04/23] iommu/vt-d: add bind_pasid_table function
Date: Mon, 14 May 2018 13:22:53 -0700 [thread overview]
Message-ID: <20180514132253.1472bbbf@jacob-builder> (raw)
In-Reply-To: <5AF8058B.4090703@linux.intel.com>
On Sun, 13 May 2018 17:29:47 +0800
Lu Baolu <baolu.lu@linux.intel.com> wrote:
> Hi,
>
> On 05/12/2018 04:53 AM, Jacob Pan wrote:
> > Add Intel VT-d ops to the generic iommu_bind_pasid_table API
> > functions.
> >
> > The primary use case is for direct assignment of SVM capable
> > device. Originated from emulated IOMMU in the guest, the request
> > goes through many layers (e.g. VFIO). Upon calling host IOMMU
> > driver, caller passes guest PASID table pointer (GPA) and size.
> >
> > Device context table entry is modified by Intel IOMMU specific
> > bind_pasid_table function. This will turn on nesting mode and
> > matching translation type.
> >
> > The unbind operation restores default context mapping.
> >
> > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
> > Signed-off-by: Liu, Yi L <yi.l.liu@linux.intel.com>
> > Signed-off-by: Ashok Raj <ashok.raj@intel.com>
> > ---
> > drivers/iommu/intel-iommu.c | 122
> > ++++++++++++++++++++++++++++++++++++++++++
> > include/linux/dma_remapping.h | 1 + 2 files changed, 123
> > insertions(+)
> >
> > diff --git a/drivers/iommu/intel-iommu.c
> > b/drivers/iommu/intel-iommu.c index a0f81a4..4623294 100644
> > --- a/drivers/iommu/intel-iommu.c
> > +++ b/drivers/iommu/intel-iommu.c
> > @@ -2409,6 +2409,7 @@ static struct dmar_domain
> > *dmar_insert_one_dev_info(struct intel_iommu *iommu,
> > info->ats_supported = info->pasid_supported = info->pri_supported =
> > 0; info->ats_enabled = info->pasid_enabled = info->pri_enabled = 0;
> > info->ats_qdep = 0;
> > + info->pasid_table_bound = 0;
> > info->dev = dev;
> > info->domain = domain;
> > info->iommu = iommu;
> > @@ -5132,6 +5133,7 @@ static void
> > intel_iommu_put_resv_regions(struct device *dev,
> > #ifdef CONFIG_INTEL_IOMMU_SVM
> > #define MAX_NR_PASID_BITS (20)
> > +#define MIN_NR_PASID_BITS (5)
> > static inline unsigned long intel_iommu_get_pts(struct intel_iommu
> > *iommu) {
> > /*
> > @@ -5258,6 +5260,122 @@ struct intel_iommu
> > *intel_svm_device_to_iommu(struct device *dev)
> > return iommu;
> > }
> > +
> > +static int intel_iommu_bind_pasid_table(struct iommu_domain
> > *domain,
> > + struct device *dev, struct pasid_table_config
> > *pasidt_binfo) +{
> > + struct intel_iommu *iommu;
> > + struct context_entry *context;
> > + struct dmar_domain *dmar_domain = to_dmar_domain(domain);
> > + struct device_domain_info *info;
> > + struct pci_dev *pdev;
> > + u8 bus, devfn, host_table_pasid_bits;
> > + u16 did, sid;
> > + int ret = 0;
> > + unsigned long flags;
> > + u64 ctx_lo;
>
> I personally prefer to have this in order.
>
> struct dmar_domain *dmar_domain = to_dmar_domain(domain);
> u8 bus, devfn, host_table_pasid_bits;
> struct device_domain_info *info;
> struct context_entry *context;
> struct intel_iommu *iommu;
> struct pci_dev *pdev;
> unsigned long flags;
> u16 did, sid;
> int ret = 0;
> u64 ctx_lo;
>
looks better.
> > +
> > + if ((pasidt_binfo->version != PASID_TABLE_CFG_VERSION_1)
> > ||
>
> Unnecessary parentheses.
>
here for readability.
> > + pasidt_binfo->bytes != sizeof(*pasidt_binfo))
>
> Alignment should match open parenthesis.
>
> > + return -EINVAL;
> > + iommu = device_to_iommu(dev, &bus, &devfn);
> > + if (!iommu)
> > + return -ENODEV;
> > + /* VT-d spec section 9.4 says pasid table size is encoded
> > as 2^(x+5) */
> > + host_table_pasid_bits = intel_iommu_get_pts(iommu) +
> > MIN_NR_PASID_BITS;
> > + if (!pasidt_binfo || pasidt_binfo->pasid_bits >
> > host_table_pasid_bits ||
>
> "!pasidt_binfo" checking should be moved up to the version checking.
>
good point!
> > + pasidt_binfo->pasid_bits < MIN_NR_PASID_BITS) {
> > + pr_err("Invalid gPASID bits %d, host range %d -
> > %d\n",
>
> How about dev_err()?
>
the error is not exactly specific to the device but rather the guest.
> > + pasidt_binfo->pasid_bits,
> > + MIN_NR_PASID_BITS, host_table_pasid_bits);
> > + return -ERANGE;
> > + }
> > + if (!ecap_nest(iommu->ecap)) {
> > + dev_err(dev, "Cannot bind PASID table, no nested
> > translation\n");
> > + ret = -ENODEV;
> > + goto out;
>
> How about
> + return -ENODEV;
> ?
>
> > + }
> > + pdev = to_pci_dev(dev);
>
> We can't always assume that it is a PCI device, right?
>
for vt-d, I don't think we expect any non-pci device.
> > + sid = PCI_DEVID(bus, devfn);
> > + info = dev->archdata.iommu;
> > +
> > + if (!info) {
> > + dev_err(dev, "Invalid device domain info\n");
> > + ret = -EINVAL;
> > + goto out;
> > + }
> > + if (info->pasid_table_bound) {
>
> We should do this checking with lock hold.
>
agreed. will hold the device_domain_lock.
> Otherwise,
>
> Thread A on CPUx Thread B on CPUy
> =========== ============
> check pasid_table_bound check pasid_table_bound
>
> mutex_lock()
> Setup context
> pasid_table_bound = 1
> mutex_unlock()
>
> mutex_lock()
> Setup context
> pasid_table_bound = 1
> mutex_unlock()
>
>
> > + dev_err(dev, "Device PASID table already bound\n");
> > + ret = -EBUSY;
> > + goto out;
> > + }
> > + if (!info->pasid_enabled) {
> > + ret = pci_enable_pasid(pdev, info->pasid_supported
> > & ~1);
> > + if (ret) {
> > + dev_err(dev, "Failed to enable PASID\n");
> > + goto out;
> > + }
> > + }
>
> I prefer a blank line here.
>
> [...]
>
> Best regards,
> Lu Baolu
next prev parent reply other threads:[~2018-05-14 20:22 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-11 20:53 [PATCH v5 00/23] IOMMU and VT-d driver support for Shared Virtual Address (SVA) Jacob Pan
2018-05-11 20:53 ` [PATCH v5 01/23] iommu: introduce bind_pasid_table API function Jacob Pan
2018-08-23 16:34 ` Auger Eric
2018-08-24 12:47 ` Liu, Yi L
2018-08-24 13:20 ` Auger Eric
2018-08-28 17:04 ` Jacob Pan
2018-08-24 15:00 ` Auger Eric
2018-08-28 5:14 ` Jacob Pan
2018-08-28 8:34 ` Auger Eric
2018-08-28 16:36 ` Jacob Pan
2018-05-11 20:53 ` [PATCH v5 02/23] iommu/vt-d: move device_domain_info to header Jacob Pan
2018-05-11 20:53 ` [PATCH v5 03/23] iommu/vt-d: add a flag for pasid table bound status Jacob Pan
2018-05-13 7:33 ` Lu Baolu
2018-05-14 18:51 ` Jacob Pan
2018-05-13 8:01 ` Lu Baolu
2018-05-14 18:52 ` Jacob Pan
2018-05-11 20:53 ` [PATCH v5 04/23] iommu/vt-d: add bind_pasid_table function Jacob Pan
2018-05-13 9:29 ` Lu Baolu
2018-05-14 20:22 ` Jacob Pan [this message]
2018-05-11 20:53 ` [PATCH v5 05/23] iommu: introduce iommu invalidate API function Jacob Pan
2018-05-11 20:53 ` [PATCH v5 06/23] iommu/vt-d: add definitions for PFSID Jacob Pan
2018-05-14 1:36 ` Lu Baolu
2018-05-14 20:30 ` Jacob Pan
2018-05-11 20:53 ` [PATCH v5 07/23] iommu/vt-d: fix dev iotlb pfsid use Jacob Pan
2018-05-14 1:52 ` Lu Baolu
2018-05-14 20:38 ` Jacob Pan
2018-05-11 20:54 ` [PATCH v5 08/23] iommu/vt-d: support flushing more translation cache types Jacob Pan
2018-05-14 2:18 ` Lu Baolu
2018-05-14 20:46 ` Jacob Pan
2018-05-17 8:44 ` kbuild test robot
2018-05-11 20:54 ` [PATCH v5 09/23] iommu/vt-d: add svm/sva invalidate function Jacob Pan
2018-05-14 3:35 ` Lu Baolu
2018-05-14 20:49 ` Jacob Pan
2018-05-11 20:54 ` [PATCH v5 10/23] iommu: introduce device fault data Jacob Pan
2018-09-21 10:07 ` Auger Eric
2018-09-21 17:05 ` Jacob Pan
2018-09-26 10:20 ` Auger Eric
2018-05-11 20:54 ` [PATCH v5 11/23] driver core: add per device iommu param Jacob Pan
2018-05-14 5:27 ` Lu Baolu
2018-05-14 20:52 ` Jacob Pan
2018-05-11 20:54 ` [PATCH v5 12/23] iommu: add a timeout parameter for prq response Jacob Pan
2018-05-11 20:54 ` [PATCH v5 13/23] iommu: introduce device fault report API Jacob Pan
2018-05-14 6:01 ` Lu Baolu
2018-05-14 20:55 ` Jacob Pan
2018-05-15 6:52 ` Lu Baolu
2018-05-17 11:41 ` Liu, Yi L
2018-05-17 15:59 ` Jacob Pan
2018-05-17 23:22 ` Liu, Yi L
2018-05-21 23:03 ` Jacob Pan
2018-09-06 9:25 ` Auger Eric
2018-09-06 12:42 ` Jean-Philippe Brucker
2018-09-06 13:14 ` Auger Eric
2018-09-06 17:06 ` Jean-Philippe Brucker
2018-09-07 7:11 ` Auger Eric
2018-09-07 11:23 ` Jean-Philippe Brucker
2018-09-14 13:24 ` Auger Eric
2018-09-17 16:57 ` Jacob Pan
2018-09-25 14:58 ` Jean-Philippe Brucker
2018-09-25 22:17 ` Jacob Pan
2018-09-26 10:14 ` Jean-Philippe Brucker
2018-05-11 20:54 ` [PATCH v5 14/23] iommu: introduce page response function Jacob Pan
2018-05-14 6:39 ` Lu Baolu
2018-05-29 16:13 ` Jacob Pan
2018-09-10 14:52 ` Auger Eric
2018-09-10 17:50 ` Jacob Pan
2018-09-10 19:06 ` Auger Eric
2018-05-11 20:54 ` [PATCH v5 15/23] iommu: handle page response timeout Jacob Pan
2018-05-14 7:43 ` Lu Baolu
2018-05-29 16:20 ` Jacob Pan
2018-05-30 7:46 ` Lu Baolu
2018-05-11 20:54 ` [PATCH v5 16/23] iommu/config: add build dependency for dmar Jacob Pan
2018-05-11 20:54 ` [PATCH v5 17/23] iommu/vt-d: report non-recoverable faults to device Jacob Pan
2018-05-14 8:17 ` Lu Baolu
2018-05-29 17:33 ` Jacob Pan
2018-05-11 20:54 ` [PATCH v5 18/23] iommu/intel-svm: report device page request Jacob Pan
2018-05-11 20:54 ` [PATCH v5 19/23] iommu/intel-svm: replace dev ops with fault report API Jacob Pan
2018-05-11 20:54 ` [PATCH v5 20/23] iommu/intel-svm: do not flush iotlb for viommu Jacob Pan
2018-05-11 20:54 ` [PATCH v5 21/23] iommu/vt-d: add intel iommu page response function Jacob Pan
2018-05-11 20:54 ` [PATCH v5 22/23] trace/iommu: add sva trace events Jacob Pan
2018-05-11 20:54 ` [PATCH v5 23/23] iommu: use sva invalidate and device fault trace event Jacob Pan
2018-05-29 15:54 ` [PATCH v5 00/23] IOMMU and VT-d driver support for Shared Virtual Address (SVA) Jacob Pan
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