From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Joerg Roedel <joro@8bytes.org>,
Robin Murphy <robin.murphy@arm.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/8] memory: tegra: Provide facility for integration with the GART driver
Date: Thu, 9 Aug 2018 13:10:08 +0200 [thread overview]
Message-ID: <20180809111008.GF21639@ulmo> (raw)
In-Reply-To: <20180804143003.15817-2-digetx@gmail.com>
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On Sat, Aug 04, 2018 at 05:29:56PM +0300, Dmitry Osipenko wrote:
> In order to report clients name and access direction on GART's page fault,
> MC driver need to access GART registers. Add facility that provides access
> to the GART.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> drivers/memory/tegra/mc.c | 26 +++++++++++++++++++++++---
> include/soc/tegra/mc.h | 13 +++++++++++++
> 2 files changed, 36 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
> index e56862495f36..4940d72b5263 100644
> --- a/drivers/memory/tegra/mc.c
> +++ b/drivers/memory/tegra/mc.c
> @@ -72,6 +72,8 @@ static const struct of_device_id tegra_mc_of_match[] = {
> };
> MODULE_DEVICE_TABLE(of, tegra_mc_of_match);
>
> +static struct tegra_mc_gart_handle *gart_handle;
> +
Why the global variable? Can't this be part of struct tegra_mc? We
already do a very similar thing with the Tegra SMMU integration, why
invent something completely different? Can't we stick to a similar
mechanism?
Given that struct tegra_smmu is opaque at the memory controller level,
we could even go and store the GART related data in the same pointer.
How about the registration code goes into a struct tegra_gart_probe()
function that is called from tegra_mc_probe() right after the SMMU
block:
if (IS_ENABLED(CONFIG_TEGRA_IOMMU_SMMU)) {
mc->smmu = tegra_smmu_probe(...);
...
}
if (IS_ENABLED(CONFIG_TEGRA_IOMMU_GART)) {
mc->smmu = tegra_gart_probe(...);
...
}
?
Thierry
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next prev parent reply other threads:[~2018-08-09 11:10 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-04 14:29 [PATCH v2 0/8] Tegra GART driver clean up and optimization Dmitry Osipenko
2018-08-04 14:29 ` [PATCH v2 1/8] memory: tegra: Provide facility for integration with the GART driver Dmitry Osipenko
2018-08-09 11:10 ` Thierry Reding [this message]
2018-08-04 14:29 ` [PATCH v2 2/8] iommu/tegra: gart: Provide access to Memory Controller driver Dmitry Osipenko
2018-08-09 11:17 ` Thierry Reding
2018-08-09 11:39 ` Dmitry Osipenko
2018-08-09 13:59 ` Thierry Reding
2018-08-09 14:22 ` Dmitry Osipenko
2018-08-09 14:52 ` Thierry Reding
2018-08-09 15:04 ` Dmitry Osipenko
2018-08-04 14:29 ` [PATCH v2 3/8] iommu/tegra: gart: Clean up drivers module code Dmitry Osipenko
2018-08-04 14:29 ` [PATCH v2 4/8] iommu/tegra: gart: Remove pr_fmt and clean up includes Dmitry Osipenko
2018-08-04 14:30 ` [PATCH v2 5/8] iommu/tegra: gart: Clean up driver probe errors handling Dmitry Osipenko
2018-08-04 14:30 ` [PATCH v2 6/8] iommu/tegra: gart: Ignore devices without IOMMU phandle in DT Dmitry Osipenko
2018-08-04 14:30 ` [PATCH v2 7/8] iommu: Introduce iotlb_sync_map callback Dmitry Osipenko
2018-08-04 14:30 ` [PATCH v2 8/8] iommu/tegra: gart: Optimize mapping / unmapping performance Dmitry Osipenko
2018-08-08 9:52 ` [PATCH v2 0/8] Tegra GART driver clean up and optimization Joerg Roedel
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