From: Corentin Labbe <clabbe.montjoie@gmail.com>
To: axboe@kernel.dk, hdegoede@redhat.com, mark.rutland@arm.com,
maxime.ripard@bootlin.com, robh+dt@kernel.org, wens@csie.org
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sunxi@googlegroups.com,
Corentin Labbe <clabbe.montjoie@gmail.com>
Subject: [PATCH v5 2/9] ata: ahci_platform: add support for AHCI controller regulator
Date: Mon, 3 Sep 2018 12:01:54 +0200 [thread overview]
Message-ID: <20180903100201.23131-3-clabbe.montjoie@gmail.com> (raw)
In-Reply-To: <20180903100201.23131-1-clabbe.montjoie@gmail.com>
The SoC R40 AHCI controller need a regulator to work.
So this patch add a way to add an optional regulator on AHCI controller.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
drivers/ata/ahci.h | 1 +
drivers/ata/libahci_platform.c | 26 ++++++++++++++++++++++++--
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 6a1515f0da40..1415f1012de5 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -352,6 +352,7 @@ struct ahci_host_priv {
struct clk *clks[AHCI_MAX_CLKS]; /* Optional */
struct reset_control *rsts; /* Optional */
struct regulator **target_pwrs; /* Optional */
+ struct regulator *ahci_regulator;/* Optional */
/*
* If platform uses PHYs. There is a 1:1 relation between the port number and
* the PHY position in this array.
diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index c92c10d55374..a886b61476a3 100644
--- a/drivers/ata/libahci_platform.c
+++ b/drivers/ata/libahci_platform.c
@@ -139,7 +139,7 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
* ahci_platform_enable_regulators - Enable regulators
* @hpriv: host private area to store config values
*
- * This function enables all the regulators found in
+ * This function enables all the regulators found in controller and
* hpriv->target_pwrs, if any. If a regulator fails to be enabled, it
* disables all the regulators already enabled in reverse order and
* returns an error.
@@ -151,6 +151,12 @@ int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv)
{
int rc, i;
+ if (hpriv->ahci_regulator) {
+ rc = regulator_enable(hpriv->ahci_regulator);
+ if (rc)
+ return rc;
+ }
+
for (i = 0; i < hpriv->nports; i++) {
if (!hpriv->target_pwrs[i])
continue;
@@ -167,6 +173,8 @@ int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv)
if (hpriv->target_pwrs[i])
regulator_disable(hpriv->target_pwrs[i]);
+ if (hpriv->ahci_regulator)
+ regulator_disable(hpriv->ahci_regulator);
return rc;
}
EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
@@ -175,7 +183,8 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
* ahci_platform_disable_regulators - Disable regulators
* @hpriv: host private area to store config values
*
- * This function disables all regulators found in hpriv->target_pwrs.
+ * This function disables all regulators found in hpriv->target_pwrs and
+ * AHCI controller.
*/
void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv)
{
@@ -186,6 +195,9 @@ void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv)
continue;
regulator_disable(hpriv->target_pwrs[i]);
}
+
+ if (hpriv->ahci_regulator)
+ regulator_disable(hpriv->ahci_regulator);
}
EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
/**
@@ -351,6 +363,7 @@ static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
*
* 1) mmio registers (IORESOURCE_MEM 0, mandatory)
* 2) regulator for controlling the targets power (optional)
+ * regulator for controlling the AHCI controller (optional)
* 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
* or for non devicetree enabled platforms a single clock
* 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional)
@@ -408,6 +421,15 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
hpriv->clks[i] = clk;
}
+ hpriv->ahci_regulator = devm_regulator_get_optional(dev, "ahci");
+ if (IS_ERR(hpriv->ahci_regulator)) {
+ rc = PTR_ERR(hpriv->ahci_regulator);
+ if (rc == -EPROBE_DEFER)
+ goto err_out;
+ rc = 0;
+ hpriv->ahci_regulator = NULL;
+ }
+
if (flags & AHCI_PLATFORM_GET_RESETS) {
hpriv->rsts = devm_reset_control_array_get_optional_shared(dev);
if (IS_ERR(hpriv->rsts)) {
--
2.16.4
next prev parent reply other threads:[~2018-09-03 10:02 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-03 10:01 [PATCH v5 0/9] ata: ahci_platform: support allwinner R40 AHCI Corentin Labbe
2018-09-03 10:01 ` [PATCH v5 1/9] dt-bindings: ata: ahci-platform: fix indentation of target-supply Corentin Labbe
2018-09-10 16:25 ` Rob Herring
2018-09-03 10:01 ` Corentin Labbe [this message]
2018-09-03 10:01 ` [PATCH v5 3/9] dt-bindings: ata: ahci-platform: document ahci-supply Corentin Labbe
2018-09-03 10:01 ` [PATCH v5 4/9] ata: ahci_platform: add support for PHY controller regulator Corentin Labbe
2018-09-03 10:01 ` [PATCH v5 5/9] dt-bindings: ata: ahci-platform: document phy-supply Corentin Labbe
2018-09-10 18:18 ` Rob Herring
2018-09-03 10:01 ` [PATCH v5 6/9] ata: ahci_sunxi: add support for r40 Corentin Labbe
2018-09-03 10:01 ` [PATCH v5 7/9] dt-bindings: ata: update ahci_sunxi bindings Corentin Labbe
2018-09-10 18:18 ` Rob Herring
2018-09-03 10:02 ` [PATCH v5 8/9] ARM: dts: sun8i: r40: add sata node Corentin Labbe
2018-09-03 10:02 ` [PATCH v5 9/9] ARM: dts: sun8i: sun8i-r40-bananapi-m2-ultra: enable AHCI Corentin Labbe
2018-09-03 12:42 ` [PATCH v5 0/9] ata: ahci_platform: support allwinner R40 AHCI Maxime Ripard
2018-09-03 12:58 ` Hans de Goede
2018-09-03 14:26 ` Jens Axboe
2018-09-05 7:25 ` Maxime Ripard
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