From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v6 7/8] clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC
Date: Sun, 21 Oct 2018 21:30:51 +0300 [thread overview]
Message-ID: <20181021183052.32023-8-digetx@gmail.com> (raw)
In-Reply-To: <20181021183052.32023-1-digetx@gmail.com>
Ensure that direct PLLM sourcing is turned off for EMC as we don't support
that configuration in the clk driver.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/tegra/clk-tegra20.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
index d3df56b6f2d1..f987ed361df6 100644
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
@@ -806,7 +806,9 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = {
static void __init tegra20_emc_clk_init(void)
{
+ const u32 use_pllm_ud = BIT(29);
struct clk *clk;
+ u32 emc_reg;
clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm,
ARRAY_SIZE(mux_pllmcp_clkm),
@@ -818,6 +820,14 @@ static void __init tegra20_emc_clk_init(void)
&emc_lock);
clks[TEGRA20_CLK_MC] = clk;
+ /* un-divided pll_m_out0 is currently unsupported */
+ emc_reg = readl_relaxed(clk_base + CLK_SOURCE_EMC);
+ if (emc_reg & use_pllm_ud) {
+ pr_err("%s: un-divided PllM_out0 used as clock source\n",
+ __func__);
+ return;
+ }
+
/*
* Note that 'emc_mux' source and 'emc' rate shouldn't be changed at
* the same time due to a HW bug, this won't happen because we're
--
2.19.0
next prev parent reply other threads:[~2018-10-21 18:32 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-21 18:30 [PATCH v6 0/8] Tegra20 External Memory Controller driver Dmitry Osipenko
2018-10-21 18:30 ` [PATCH v6 1/8] dt: bindings: tegra20-emc: Document interrupt property Dmitry Osipenko
2018-10-25 14:25 ` Thierry Reding
2018-10-21 18:30 ` [PATCH v6 2/8] dt: bindings: tegra20-emc: Document clock property Dmitry Osipenko
2018-10-25 14:26 ` Thierry Reding
2018-10-21 18:30 ` [PATCH v6 3/8] dt: bindings: Move tegra20-emc binding to memory-controllers directory Dmitry Osipenko
2018-10-25 14:27 ` Thierry Reding
2018-10-21 18:30 ` [PATCH v6 4/8] ARM: dts: tegra20: Add interrupt entry to External Memory Controller Dmitry Osipenko
2018-10-25 14:28 ` Thierry Reding
2018-10-25 14:28 ` Thierry Reding
2018-10-21 18:30 ` [PATCH v6 5/8] ARM: dts: tegra20: Add clock " Dmitry Osipenko
2018-10-25 14:29 ` Thierry Reding
2018-10-21 18:30 ` [PATCH v6 6/8] clk: tegra20: Turn EMC clock gate into divider Dmitry Osipenko
2018-10-25 14:30 ` Thierry Reding
2018-10-21 18:30 ` Dmitry Osipenko [this message]
2018-10-25 14:31 ` [PATCH v6 7/8] clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC Thierry Reding
2018-10-21 18:30 ` [PATCH v6 8/8] memory: tegra: Introduce Tegra20 EMC driver Dmitry Osipenko
2018-10-25 14:38 ` Thierry Reding
2018-10-25 18:36 ` Dmitry Osipenko
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