From: Jernej Skrabec <jernej.skrabec@siol.net>
To: maxime.ripard@bootlin.com, wens@csie.org
Cc: robh+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
airlied@linux.ie, architt@codeaurora.org, a.hajda@samsung.com,
Laurent.pinchart@ideasonboard.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com,
jernej.skrabec@siol.net, Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH v3 27/28] arm64: dts: allwinner: h6: Add HDMI pipeline
Date: Sun, 4 Nov 2018 19:27:04 +0100 [thread overview]
Message-ID: <20181104182705.18047-28-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20181104182705.18047-1-jernej.skrabec@siol.net>
This commit adds all entries needed for HDMI to function properly.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
[added DE3 bus]
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 201 +++++++++++++++++++
1 file changed, 201 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 040828d2e2c0..59dda8f89d23 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -6,8 +6,11 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun50i-h6-ccu.h>
#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
+#include <dt-bindings/clock/sun8i-de2.h>
+#include <dt-bindings/clock/sun8i-tcon-top.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
+#include <dt-bindings/reset/sun8i-de2.h>
/ {
interrupt-parent = <&gic>;
@@ -86,12 +89,63 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ de: display-engine {
+ compatible = "allwinner,sun50i-h6-display-engine";
+ allwinner,pipelines = <&mixer0>;
+ status = "disabled";
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
+ de3@1000000 {
+ compatible = "allwinner,sun50i-h6-de3",
+ "allwinner,sun50i-a64-de2";
+ reg = <0x1000000 0x400000>;
+ allwinner,sram = <&de2_sram 1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1000000 0x400000>;
+
+ display_clocks: clock@0 {
+ compatible = "allwinner,sun50i-h6-de3-clk";
+ reg = <0x0 0x10000>;
+ clocks = <&ccu CLK_DE>,
+ <&ccu CLK_BUS_DE>;
+ clock-names = "mod",
+ "bus";
+ resets = <&ccu RST_BUS_DE>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ mixer0: mixer@100000 {
+ compatible = "allwinner,sun50i-h6-de3-mixer-0";
+ reg = <0x100000 0x100000>;
+ clocks = <&display_clocks CLK_BUS_MIXER0>,
+ <&display_clocks CLK_MIXER0>;
+ clock-names = "bus",
+ "mod";
+ resets = <&display_clocks RST_MIXER0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mixer0_out: port@1 {
+ reg = <1>;
+
+ mixer0_out_tcon_top_mixer0: endpoint {
+ remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
+ };
+ };
+ };
+ };
+ };
+
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h6-system-control",
"allwinner,sun50i-a64-system-control";
@@ -149,6 +203,11 @@
interrupt-controller;
#interrupt-cells = <3>;
+ hdmi_pins: hdmi-pins {
+ pins = "PH8", "PH9", "PH10";
+ function = "hdmi";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@@ -258,6 +317,148 @@
status = "disabled";
};
+ hdmi: hdmi@6000000 {
+ compatible = "allwinner,sun50i-h6-dw-hdmi";
+ reg = <0x06000000 0x10000>;
+ reg-io-width = <1>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
+ <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
+ <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
+ clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
+ "hdcp-bus";
+ resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>;
+ reset-names = "ctrl", "hdcp";
+ phys = <&hdmi_phy>;
+ phy-names = "hdmi-phy";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_pins>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port@0 {
+ reg = <0>;
+
+ hdmi_in_tcon_top: endpoint {
+ remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
+ };
+ };
+
+ hdmi_out: port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
+ hdmi_phy: hdmi-phy@6010000 {
+ compatible = "allwinner,sun50i-h6-hdmi-phy";
+ reg = <0x06010000 0x10000>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_HDMI>;
+ reset-names = "phy";
+ #phy-cells = <0>;
+ };
+
+ tcon_top: tcon-top@6510000 {
+ compatible = "allwinner,sun50i-h6-tcon-top";
+ reg = <0x06510000 0x1000>;
+ clocks = <&ccu CLK_BUS_TCON_TOP>,
+ <&ccu CLK_TCON_TV0>;
+ clock-names = "bus",
+ "tcon-tv0";
+ clock-output-names = "tcon-top-tv0";
+ resets = <&ccu RST_BUS_TCON_TOP>;
+ reset-names = "rst";
+ #clock-cells = <1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon_top_mixer0_in: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon_top_mixer0_in_mixer0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
+ };
+ };
+
+ tcon_top_mixer0_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon_top_mixer0_out_tcon_tv: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
+ };
+ };
+
+ tcon_top_hdmi_in: port@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+
+ tcon_top_hdmi_in_tcon_tv: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&tcon_tv_out_tcon_top>;
+ };
+ };
+
+ tcon_top_hdmi_out: port@5 {
+ reg = <5>;
+
+ tcon_top_hdmi_out_hdmi: endpoint {
+ remote-endpoint = <&hdmi_in_tcon_top>;
+ };
+ };
+ };
+ };
+
+ tcon_tv: lcd-controller@6515000 {
+ compatible = "allwinner,sun50i-h6-tcon-tv",
+ "allwinner,sun8i-r40-tcon-tv";
+ reg = <0x06515000 0x1000>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_TCON_TV0>,
+ <&tcon_top CLK_TCON_TOP_TV0>;
+ clock-names = "ahb",
+ "tcon-ch1";
+ resets = <&ccu RST_BUS_TCON_TV0>;
+ reset-names = "lcd";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon_tv_in: port@0 {
+ reg = <0>;
+
+ tcon_tv_in_tcon_top_mixer0: endpoint {
+ remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
+ };
+ };
+
+ tcon_tv_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon_tv_out_tcon_top: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
+ };
+ };
+ };
+ };
+
r_ccu: clock@7010000 {
compatible = "allwinner,sun50i-h6-r-ccu";
reg = <0x07010000 0x400>;
--
2.19.1
next prev parent reply other threads:[~2018-11-04 18:28 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-04 18:26 [PATCH v3 00/28] Allwinner H6 DE3 and HDMI support Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 01/28] dt-bindings: bus: add H6 DE3 bus binding Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 02/28] clk: sunxi-ng: Adjust MP clock parent rate when allowed Jernej Skrabec
2019-01-10 9:15 ` [linux-sunxi] " Priit Laes
2019-01-10 17:10 ` Jernej Škrabec
2019-01-16 12:09 ` Priit Laes
2019-01-16 17:00 ` Jernej Škrabec
2019-01-17 7:24 ` Priit Laes
2019-01-18 21:51 ` Jernej Škrabec
2019-01-21 8:37 ` Priit Laes
2019-01-21 13:34 ` Priit Laes
2019-01-21 18:13 ` Jernej Škrabec
2019-03-19 10:34 ` Priit Laes
2018-11-04 18:26 ` [PATCH v3 03/28] clk: sunxi-ng: Use u64 for calculation of NM rate Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 04/28] clk: sunxi-ng: h6: Set video PLLs limits Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 05/28] dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 06/28] clk: sunxi-ng: Add support for H6 DE3 clocks Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 07/28] dt-bindings: display: sun4i-drm: Add H6 display engine compatibles Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 08/28] drm/sun4i: Add compatible for H6 display engine Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 09/28] drm/sun4i: Rework DE2 register defines Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 10/28] drm/sun4i: Fix DE2 mixer size Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 11/28] drm/sun4i: Disable unused DE2 sub-engines Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 12/28] drm/sun4i: Add basic support for DE3 Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 13/28] drm/sun4i: Add support for H6 DE3 mixer 0 Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 14/28] drm/bridge/synopsys: dw-hdmi: Enable workaround for v2.12a Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 15/28] drm/sun4i: Not all DW HDMI controllers has scrambled addresses Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 16/28] drm/sun4i: dw-hdmi: Make mode_valid function configurable Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 17/28] drm/sun4i: dw-hdmi: Add quirk for setting TMDS clock Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 18/28] dt-bindings: display: sunxi: add DT binding for Allwinner H6 DW HDMI Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 19/28] drm/sun4i: Add support for H6 DW HDMI controller Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 20/28] drm/sun4i: dw-hdmi-phy: Reorder quirks by family Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 21/28] drm/sun4i: Add support for Synopsys HDMI PHY Jernej Skrabec
2018-11-04 18:26 ` [PATCH v3 22/28] drm/sun4i: Add support for H6 " Jernej Skrabec
2018-11-04 18:27 ` [PATCH v3 23/28] drm/sun4i: Initialize registers in tcon-top driver Jernej Skrabec
2018-11-04 18:27 ` [PATCH v3 24/28] drm: sun4i: add quirks for TCON TOP Jernej Skrabec
2018-11-04 18:27 ` [PATCH v3 25/28] dt-bindings: display: sun4i-drm: document H6 " Jernej Skrabec
2018-11-04 18:27 ` [PATCH v3 26/28] drm: sun4i: add support for " Jernej Skrabec
2018-11-04 18:27 ` Jernej Skrabec [this message]
2018-11-04 18:27 ` [PATCH v3 28/28] arm64: dts: allwinner: h6: Enable HDMI output on Pine H64 board Jernej Skrabec
2018-11-05 9:43 ` [PATCH v3 00/28] Allwinner H6 DE3 and HDMI support Maxime Ripard
2018-11-06 15:54 ` Jernej Škrabec
2018-11-06 17:20 ` Jernej Škrabec
2018-11-07 9:44 ` Maxime Ripard
2018-12-03 18:09 ` Jernej Škrabec
2018-12-04 8:29 ` Maxime Ripard
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