From: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
To: x86@kernel.org, platform-driver-x86@vger.kernel.org,
linux-sgx@vger.kernel.org
Cc: dave.hansen@intel.com, sean.j.christopherson@intel.com,
nhorman@redhat.com, npmccallum@redhat.com, serge.ayoun@intel.com,
shay.katz-zamir@intel.com, haitao.huang@linux.intel.com,
andriy.shevchenko@linux.intel.com, tglx@linutronix.de,
kai.svahn@intel.com, mark.shanahan@intel.com,
luto@amacapital.net,
Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>,
Suresh Siddha <suresh.b.siddha@intel.com>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Reinette Chatre <reinette.chatre@intel.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Pu Wen <puwen@hygon.cn>,
linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT
AND 64-BIT))
Subject: [PATCH v17 15/23] x86/sgx: Enumerate and track EPC sections
Date: Fri, 16 Nov 2018 03:01:22 +0200 [thread overview]
Message-ID: <20181116010412.23967-16-jarkko.sakkinen@linux.intel.com> (raw)
In-Reply-To: <20181116010412.23967-1-jarkko.sakkinen@linux.intel.com>
From: Sean Christopherson <sean.j.christopherson@intel.com>
Enumerate Enclave Page Cache (EPC) sections via CPUID and add the data
structures necessary to track EPC pages so that they can be allocated,
freed and managed. As a system may have multiple EPC sections, invoke
CPUID on SGX sub-leafs until an invalid leaf is encountered.
On NUMA systems, a node can have at most one bank. A bank can be at
most part of two nodes. SGX supports both nodes with a single memory
controller and also sub-cluster nodes with severals memory controllers
on a single die.
For simplicity, support a maximum of eight EPC sections. Current
client hardware supports only a single section, while upcoming server
hardware will support at most eight sections. Bounding the number of
sections also allows the section ID to be embedded along with a page's
offset in a single unsigned long, enabling easy retrieval of both the
VA and PA for a given page.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Co-developed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Co-developed-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Co-developed-by: Serge Ayoun <serge.ayoun@intel.com>
Signed-off-by: Serge Ayoun <serge.ayoun@intel.com>
---
arch/x86/Kconfig | 17 ++++
arch/x86/include/asm/sgx.h | 58 +++++++++++++
arch/x86/kernel/cpu/Makefile | 1 +
arch/x86/kernel/cpu/intel_sgx.c | 146 ++++++++++++++++++++++++++++++++
4 files changed, 222 insertions(+)
create mode 100644 arch/x86/kernel/cpu/intel_sgx.c
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 9d734f3c8234..4c3a325351ce 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1919,6 +1919,23 @@ config X86_INTEL_MEMORY_PROTECTION_KEYS
If unsure, say y.
+config INTEL_SGX_CORE
+ bool "Intel SGX core functionality"
+ depends on X86_64 && CPU_SUP_INTEL
+ help
+ Intel Software Guard eXtensions (SGX) CPU feature that allows ring 3
+ applications to create enclaves: private regions of memory that are
+ architecturally protected from unauthorized access and/or modification.
+
+ This option enables kernel recognition of SGX, high-level management
+ of the Enclave Page Cache (EPC), tracking and writing of SGX Launch
+ Enclave Hash MSRs, and allows for virtualization of SGX via KVM. By
+ itself, this option does not provide SGX support to userspace.
+
+ For details, see Documentation/x86/intel_sgx.rst
+
+ If unsure, say N.
+
config EFI
bool "EFI runtime service support"
depends on ACPI
diff --git a/arch/x86/include/asm/sgx.h b/arch/x86/include/asm/sgx.h
index 3d5ba1d23dfb..efe3e213e582 100644
--- a/arch/x86/include/asm/sgx.h
+++ b/arch/x86/include/asm/sgx.h
@@ -2,9 +2,67 @@
#ifndef _ASM_X86_SGX_H
#define _ASM_X86_SGX_H
+#include <linux/bitops.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/rwsem.h>
+#include <linux/types.h>
#include <asm/asm.h>
#include <asm/sgx_arch.h>
+struct sgx_epc_page {
+ unsigned long desc;
+ struct list_head list;
+};
+
+/**
+ * struct sgx_epc_section
+ *
+ * The firmware can define multiple chunks of EPC to the different areas of the
+ * physical memory e.g. for memory areas of the each node. This structure is
+ * used to store EPC pages for one EPC section and virtual memory area where
+ * the pages have been mapped.
+ */
+struct sgx_epc_section {
+ unsigned long pa;
+ void *va;
+ struct sgx_epc_page **pages;
+ unsigned long free_cnt;
+ spinlock_t lock;
+};
+
+#define SGX_MAX_EPC_SECTIONS 8
+
+extern struct sgx_epc_section sgx_epc_sections[SGX_MAX_EPC_SECTIONS];
+
+/**
+ * enum sgx_epc_page_desc - bits and masks for an EPC page's descriptor
+ * %SGX_EPC_SECTION_MASK: SGX allows to have multiple EPC sections in the
+ * physical memory. The existing and near-future
+ * hardware defines at most eight sections, hence
+ * three bits to hold a section.
+ * %SGX_EPC_PAGE_RECLAIMABLE: The page page is reclaimable. Used when freeing
+ * a page to know that we also need to remove the
+ * page from the list of reclaimable pages.
+ */
+enum sgx_epc_page_desc {
+ SGX_EPC_SECTION_MASK = GENMASK_ULL(3, 0),
+ SGX_EPC_PAGE_RECLAIMABLE = BIT(4),
+ /* bits 12-63 are reserved for the physical page address of the page */
+};
+
+static inline struct sgx_epc_section *sgx_epc_section(struct sgx_epc_page *page)
+{
+ return &sgx_epc_sections[page->desc & SGX_EPC_SECTION_MASK];
+}
+
+static inline void *sgx_epc_addr(struct sgx_epc_page *page)
+{
+ struct sgx_epc_section *section = sgx_epc_section(page);
+
+ return section->va + (page->desc & PAGE_MASK) - section->pa;
+}
+
/**
* ENCLS_FAULT_FLAG - flag signifying an ENCLS return code is a trapnr
*
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 1f5d2291c31e..b496c9360b88 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
obj-$(CONFIG_INTEL_RDT) += intel_rdt.o intel_rdt_rdtgroup.o intel_rdt_monitor.o
obj-$(CONFIG_INTEL_RDT) += intel_rdt_ctrlmondata.o intel_rdt_pseudo_lock.o
CFLAGS_intel_rdt_pseudo_lock.o = -I$(src)
+obj-$(CONFIG_INTEL_SGX_CORE) += intel_sgx.o
obj-$(CONFIG_X86_MCE) += mcheck/
obj-$(CONFIG_MTRR) += mtrr/
diff --git a/arch/x86/kernel/cpu/intel_sgx.c b/arch/x86/kernel/cpu/intel_sgx.c
new file mode 100644
index 000000000000..bfdf907c5d94
--- /dev/null
+++ b/arch/x86/kernel/cpu/intel_sgx.c
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+// Copyright(c) 2016-17 Intel Corporation.
+
+#include <linux/freezer.h>
+#include <linux/highmem.h>
+#include <linux/kthread.h>
+#include <linux/pagemap.h>
+#include <linux/ratelimit.h>
+#include <linux/sched/signal.h>
+#include <linux/slab.h>
+#include <asm/sgx.h>
+
+struct sgx_epc_section sgx_epc_sections[SGX_MAX_EPC_SECTIONS];
+EXPORT_SYMBOL_GPL(sgx_epc_sections);
+
+static int sgx_nr_epc_sections;
+
+static __init void sgx_free_epc_section(struct sgx_epc_section *section)
+{
+ int i;
+
+ if (section->pages) {
+ for (i = 0; i < section->free_cnt && section->pages[i]; i++)
+ kfree(section->pages[i]);
+ kfree(section->pages);
+ }
+ memunmap(section->va);
+}
+
+static __init int sgx_init_epc_section(u64 addr, u64 size, unsigned long index,
+ struct sgx_epc_section *section)
+{
+ unsigned long nr_pages = size >> PAGE_SHIFT;
+ unsigned long i;
+
+ section->va = memremap(addr, size, MEMREMAP_WB);
+ if (!section->va)
+ return -ENOMEM;
+
+ section->pa = addr;
+ section->free_cnt = nr_pages;
+ spin_lock_init(§ion->lock);
+
+ section->pages = kcalloc(nr_pages, sizeof(struct sgx_epc_page *),
+ GFP_KERNEL);
+ if (!section->pages) {
+ pr_warn("sgx: EPC section allocation failed\n");
+ goto out;
+ }
+
+ for (i = 0; i < nr_pages; i++) {
+ section->pages[i] = kzalloc(sizeof(struct sgx_epc_page),
+ GFP_KERNEL);
+ if (!section->pages[i])
+ goto out;
+
+ section->pages[i]->desc = (addr + (i << PAGE_SHIFT)) | index;
+ }
+
+ return 0;
+out:
+ sgx_free_epc_section(section);
+ return -ENOMEM;
+}
+
+static __init void sgx_page_cache_teardown(void)
+{
+ int i;
+
+ for (i = 0; i < sgx_nr_epc_sections; i++)
+ sgx_free_epc_section(&sgx_epc_sections[i]);
+}
+
+/**
+ * A section metric is concatenated in a way that @low bits 12-31 define the
+ * bits 12-31 of the metric and @high bits 0-19 define the bits 32-51 of the
+ * metric.
+ */
+static inline u64 sgx_calc_section_metric(u64 low, u64 high)
+{
+ return (low & GENMASK_ULL(31, 12)) +
+ ((high & GENMASK_ULL(19, 0)) << 32);
+}
+
+static __init int sgx_page_cache_init(void)
+{
+ u32 eax, ebx, ecx, edx, type;
+ u64 pa, size;
+ int ret;
+ int i;
+
+ BUILD_BUG_ON(SGX_MAX_EPC_SECTIONS > (SGX_EPC_SECTION_MASK + 1));
+
+ for (i = 0; i < (SGX_MAX_EPC_SECTIONS + 1); i++) {
+ cpuid_count(SGX_CPUID, i + SGX_CPUID_FIRST_VARIABLE_SUB_LEAF,
+ &eax, &ebx, &ecx, &edx);
+
+ type = eax & SGX_CPUID_SUB_LEAF_TYPE_MASK;
+ if (type == SGX_CPUID_SUB_LEAF_INVALID)
+ break;
+ if (type != SGX_CPUID_SUB_LEAF_EPC_SECTION) {
+ pr_err_once("sgx: Unknown sub-leaf type: %u\n", type);
+ return -ENODEV;
+ }
+ if (i == SGX_MAX_EPC_SECTIONS) {
+ pr_warn("sgx: More than " __stringify(SGX_MAX_EPC_SECTIONS)
+ " EPC sections\n");
+ break;
+ }
+
+ pa = sgx_calc_section_metric(eax, ebx);
+ size = sgx_calc_section_metric(ecx, edx);
+ pr_info("sgx: EPC section 0x%llx-0x%llx\n", pa, pa + size - 1);
+
+ ret = sgx_init_epc_section(pa, size, i, &sgx_epc_sections[i]);
+ if (ret) {
+ sgx_page_cache_teardown();
+ return ret;
+ }
+
+ sgx_nr_epc_sections++;
+ }
+
+ if (!sgx_nr_epc_sections) {
+ pr_err("sgx: There are zero EPC sections.\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static __init int sgx_init(void)
+{
+ int ret;
+
+ if (!boot_cpu_has(X86_FEATURE_SGX))
+ return false;
+
+ ret = sgx_page_cache_init();
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+arch_initcall(sgx_init);
--
2.19.1
next prev parent reply other threads:[~2018-11-16 1:07 UTC|newest]
Thread overview: 155+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20181116010412.23967-1-jarkko.sakkinen@linux.intel.com>
2018-11-16 1:01 ` [PATCH v17 01/23] x86/sgx: Update MAINTAINERS Jarkko Sakkinen
2018-11-16 14:22 ` Borislav Petkov
2018-11-16 15:07 ` Jarkko Sakkinen
2018-11-16 20:24 ` Borislav Petkov
2018-11-18 8:20 ` Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 02/23] x86/cpufeatures: Add Intel-defined SGX feature bit Jarkko Sakkinen
2018-11-16 14:28 ` Borislav Petkov
2018-11-16 15:13 ` Jarkko Sakkinen
2018-11-16 15:18 ` Jarkko Sakkinen
2018-11-16 20:53 ` Borislav Petkov
2018-11-16 1:01 ` [PATCH v17 03/23] x86/cpufeatures: Add SGX sub-features (as Linux-defined bits) Jarkko Sakkinen
2018-11-16 14:37 ` Borislav Petkov
2018-11-16 15:38 ` Sean Christopherson
2018-11-16 23:31 ` Dave Hansen
2018-11-18 8:36 ` Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 04/23] x86/msr: Add IA32_FEATURE_CONTROL.SGX_ENABLE definition Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 05/23] x86/cpufeatures: Add Intel-defined SGX_LC feature bit Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 06/23] x86/cpu/intel: Detect SGX support and update caps appropriately Jarkko Sakkinen
2018-11-16 23:32 ` Dave Hansen
2018-11-18 8:37 ` Jarkko Sakkinen
2018-11-21 18:17 ` Borislav Petkov
2018-11-24 13:54 ` Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 07/23] x86/mm: x86/sgx: Add new 'PF_SGX' page fault error code bit Jarkko Sakkinen
2018-11-16 23:33 ` Dave Hansen
2018-11-18 8:38 ` Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 08/23] x86/mm: x86/sgx: Signal SIGSEGV for userspace #PFs w/ PF_SGX Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 09/23] x86/sgx: Define SGX1 and SGX2 ENCLS leafs Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 10/23] x86/sgx: Add ENCLS architectural error codes Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 11/23] x86/sgx: Add SGX1 and SGX2 architectural data structures Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 12/23] x86/sgx: Add definitions for SGX's CPUID leaf and variable sub-leafs Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 13/23] x86/msr: Add SGX Launch Control MSR definitions Jarkko Sakkinen
2018-11-16 17:29 ` Sean Christopherson
2018-11-18 8:19 ` Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 14/23] x86/sgx: Add wrappers for ENCLS leaf functions Jarkko Sakkinen
2018-11-16 1:01 ` Jarkko Sakkinen [this message]
2018-11-16 1:01 ` [PATCH v17 16/23] x86/sgx: Add functions to allocate and free EPC pages Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 17/23] x86/sgx: Add sgx_einit() for initializing enclaves Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 18/23] platform/x86: Intel SGX driver Jarkko Sakkinen
2018-11-16 1:37 ` Randy Dunlap
2018-11-16 11:23 ` Jarkko Sakkinen
2018-11-19 15:06 ` Jarkko Sakkinen
2018-11-19 16:22 ` Jethro Beekman
2018-11-19 17:19 ` Jarkko Sakkinen
2018-11-19 18:18 ` Andy Lutomirski
2018-11-20 11:00 ` Jarkko Sakkinen
2018-11-19 15:29 ` Andy Lutomirski
2018-11-19 16:19 ` Jarkko Sakkinen
2018-11-19 16:59 ` Andy Lutomirski
2018-11-20 12:04 ` Jarkko Sakkinen
2018-11-22 11:12 ` Dr. Greg
2018-11-22 15:21 ` Andy Lutomirski
2018-11-24 17:21 ` Jarkko Sakkinen
2018-11-24 20:13 ` Dr. Greg
2018-11-26 21:15 ` Jarkko Sakkinen
2018-11-25 14:53 ` Jarkko Sakkinen
2018-11-25 16:22 ` Andy Lutomirski
2018-11-25 18:55 ` Dr. Greg
2018-11-25 23:51 ` Jarkko Sakkinen
[not found] ` <D45BC005-5064-4C75-B486-4E43C454E2F6@amacapital.net>
2018-11-26 0:37 ` Andy Lutomirski
2018-11-26 11:00 ` Dr. Greg
2018-11-26 18:22 ` Andy Lutomirski
2018-11-26 22:16 ` Jarkko Sakkinen
2018-11-26 21:51 ` Jarkko Sakkinen
2018-11-26 23:04 ` Jarkko Sakkinen
2018-11-27 8:55 ` Dr. Greg
2018-11-27 16:41 ` Jarkko Sakkinen
2018-11-27 17:55 ` Andy Lutomirski
2018-11-28 10:49 ` Dr. Greg
2018-11-28 19:22 ` Jarkko Sakkinen
2018-12-10 10:49 ` Dr. Greg
2018-12-12 18:00 ` Jarkko Sakkinen
2018-12-14 23:59 ` Dr. Greg
2018-12-15 0:06 ` Sean Christopherson
2018-12-15 23:22 ` Dr. Greg
2018-12-17 14:27 ` Sean Christopherson
2018-12-17 13:28 ` Jarkko Sakkinen
2018-12-17 13:39 ` Jarkko Sakkinen
2018-12-17 14:08 ` Jarkko Sakkinen
2018-12-17 14:13 ` Jarkko Sakkinen
2018-12-17 16:34 ` Dr. Greg
2018-12-17 17:31 ` Sean Christopherson
2018-12-17 17:49 ` Jarkko Sakkinen
2018-12-17 18:09 ` Sean Christopherson
2018-12-17 18:23 ` Jarkko Sakkinen
2018-12-17 18:46 ` Sean Christopherson
2018-12-17 19:36 ` Jarkko Sakkinen
2018-11-27 16:46 ` Jarkko Sakkinen
2018-11-28 21:52 ` Andy Lutomirski
2018-11-22 20:56 ` Andy Lutomirski
2018-11-23 10:39 ` Dr. Greg
2018-11-24 16:45 ` Jarkko Sakkinen
2018-11-28 5:08 ` Jarkko Sakkinen
2018-12-09 17:01 ` Pavel Machek
2018-11-20 11:15 ` Dr. Greg
2018-11-24 16:15 ` Jarkko Sakkinen
2018-11-24 19:24 ` Dr. Greg
2018-11-26 19:39 ` Jarkko Sakkinen
2018-12-09 17:01 ` Pavel Machek
2018-12-10 14:46 ` Dr. Greg
2018-12-17 17:45 ` Dave Hansen
2018-12-17 18:01 ` Jarkko Sakkinen
2018-12-17 18:07 ` Dave Hansen
2018-12-17 18:31 ` Jarkko Sakkinen
2018-12-17 18:36 ` Sean Christopherson
2018-12-17 18:43 ` Jarkko Sakkinen
2018-12-17 18:47 ` Dave Hansen
2018-12-17 19:12 ` Andy Lutomirski
2018-12-17 19:17 ` Dave Hansen
2018-12-17 19:25 ` Andy Lutomirski
2018-12-17 19:54 ` Jarkko Sakkinen
2018-12-17 19:49 ` Jarkko Sakkinen
2018-12-17 19:53 ` Dave Hansen
2018-12-17 19:55 ` Andy Lutomirski
2018-12-17 20:03 ` Dave Hansen
2018-12-17 20:10 ` Andy Lutomirski
2018-12-17 20:15 ` Dave Hansen
2018-12-17 22:36 ` Sean Christopherson
2018-12-18 1:40 ` Jarkko Sakkinen
2018-12-17 22:20 ` Sean Christopherson
2018-12-18 1:39 ` Jarkko Sakkinen
2018-12-18 3:27 ` Jarkko Sakkinen
2018-12-18 5:02 ` Andy Lutomirski
2018-12-18 13:27 ` Jarkko Sakkinen
2018-12-18 4:55 ` Andy Lutomirski
2018-12-18 13:18 ` Jarkko Sakkinen
2018-12-18 4:59 ` Andy Lutomirski
2018-12-18 13:11 ` Jarkko Sakkinen
2018-12-18 15:44 ` Sean Christopherson
2018-12-18 18:53 ` Sean Christopherson
2018-12-19 5:00 ` Jarkko Sakkinen
2018-12-19 5:13 ` Jarkko Sakkinen
2018-12-21 18:28 ` Sean Christopherson
2018-12-22 0:01 ` Jarkko Sakkinen
2018-12-19 4:47 ` Jarkko Sakkinen
2018-12-19 5:24 ` Jarkko Sakkinen
2018-12-18 1:17 ` Jarkko Sakkinen
2018-12-18 1:31 ` Jarkko Sakkinen
2018-12-17 18:48 ` Sean Christopherson
2018-12-17 19:09 ` Dave Hansen
2018-12-17 19:37 ` Jarkko Sakkinen
2018-12-17 19:40 ` Dave Hansen
2018-12-17 19:33 ` Jarkko Sakkinen
2018-12-17 20:21 ` Jarkko Sakkinen
2018-12-18 13:13 ` Jarkko Sakkinen
2018-12-18 15:46 ` Sean Christopherson
2018-12-18 5:55 ` Andy Lutomirski
2018-12-19 5:22 ` Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 19/23] platform/x86: sgx: Add swapping functionality to the " Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 20/23] x86/sgx: Add a simple swapper for the EPC memory manager Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 21/23] platform/x86: ptrace() support for the SGX driver Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 22/23] x86/sgx: SGX documentation Jarkko Sakkinen
2018-12-03 3:28 ` Randy Dunlap
2018-12-03 9:32 ` Jarkko Sakkinen
2018-11-16 1:01 ` [PATCH v17 23/23] selftests/x86: Add a selftest for SGX Jarkko Sakkinen
2018-11-16 11:17 ` [PATCH v17 00/23] Intel SGX1 support Jarkko Sakkinen
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for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).