From: Sibi Sankar <sibis@codeaurora.org>
To: bjorn.andersson@linaro.org, robh+dt@kernel.org,
andy.gross@linaro.org, rnayak@codeaurora.org
Cc: david.brown@linaro.org, mark.rutland@arm.com,
linux-kernel@vger.kernel.org,
linux-arm-msm-owner@vger.kernel.org, devicetree@vger.kernel.org,
Sibi Sankar <sibis@codeaurora.org>
Subject: [PATCH v2 6/9] arm64: dts: qcom: qcs404: Add rpmpd node
Date: Sun, 24 Mar 2019 23:20:04 +0530 [thread overview]
Message-ID: <20190324175007.29040-7-sibis@codeaurora.org> (raw)
In-Reply-To: <20190324175007.29040-1-sibis@codeaurora.org>
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Add the rpmpd node on the qcs404 and define the available levels.
[sibis: fixup available levels]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 55 ++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index e8fd26633d57..a7d46647c416 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -4,6 +4,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-qcs404.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/power/qcom-rpmpd.h>
/ {
interrupt-parent = <&intc>;
@@ -230,6 +231,60 @@
compatible = "qcom,rpmcc-qcs404";
#clock-cells = <1>;
};
+
+ rpmpd: power-controller {
+ compatible = "qcom,qcs404-rpmpd";
+ #power-domain-cells = <1>;
+ operating-points-v2 = <&rpmpd_opp_table>;
+
+ rpmpd_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ rpmpd_opp_ret: opp1 {
+ opp-level = <RPM_SMD_LEVEL_RETENTION>;
+ };
+
+ rpmpd_opp_ret_plus: opp2 {
+ opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;
+ };
+
+ rpmpd_opp_min_svs: opp3 {
+ opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
+ };
+
+ rpmpd_opp_low_svs: opp4 {
+ opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
+ };
+
+ rpmhpd_opp_svs: opp5 {
+ opp-level = <RPM_SMD_LEVEL_SVS>;
+ };
+
+ rpmhpd_opp_svs_plus: opp6 {
+ opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
+ };
+
+ rpmhpd_opp_nom: opp7 {
+ opp-level = <RPM_SMD_LEVEL_NOM>;
+ };
+
+ rpmhpd_opp_nom_plus: opp8 {
+ opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
+ };
+
+ rpmhpd_opp_turbo: opp9 {
+ opp-level = <RPM_SMD_LEVEL_TURBO>;
+ };
+
+ rpmhpd_opp_turbo_no_cpr: opp10 {
+ opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;
+ };
+
+ rpmhpd_opp_turbo_plus: opp11 {
+ opp-level = <RPM_SMD_LEVEL_BINNING>;
+ };
+ };
+ };
};
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2019-03-24 17:50 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-24 17:49 [PATCH v2 0/9] RPMPD for QCS404 and MSM8998 Sibi Sankar
2019-03-24 17:49 ` [PATCH v2 1/9] soc: qcom: rpmpd: fixup rpmpd set performance state Sibi Sankar
2019-03-25 4:03 ` Rajendra Nayak
2019-03-27 13:26 ` Sibi Sankar
2019-03-24 17:50 ` [PATCH v2 2/9] soc: qcom: rpmpd: Add support to set rpmpd state to max Sibi Sankar
2019-03-25 4:06 ` Rajendra Nayak
2019-03-27 13:27 ` Sibi Sankar
2019-03-24 17:50 ` [PATCH v2 3/9] soc: qcom: rpmpd: Modify corner defining macros Sibi Sankar
2019-03-25 4:07 ` Rajendra Nayak
2019-03-27 13:28 ` Sibi Sankar
2019-03-24 17:50 ` [PATCH v2 4/9] dt-bindings: power: Add rpm power domain bindings for qcs404 Sibi Sankar
2019-03-25 4:21 ` Rajendra Nayak
2019-03-27 13:25 ` Sibi Sankar
2019-03-24 17:50 ` [PATCH v2 5/9] soc: qcom: rpmpd: Add QCS404 power-domains Sibi Sankar
2019-03-24 17:50 ` Sibi Sankar [this message]
2019-03-24 17:50 ` [PATCH v2 7/9] dt-bindings: power: Add rpm power domain bindings for msm8998 Sibi Sankar
2019-03-24 17:50 ` [PATCH v2 8/9] soc: qcom: rpmpd: Add MSM8998 power-domains Sibi Sankar
2019-03-24 17:50 ` [PATCH v2 9/9] arm64: dts: qcom: msm8998: Add rpmpd node Sibi Sankar
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