From: Atish Patra <atish.patra@wdc.com>
To: linux-kernel@vger.kernel.org
Cc: Atish Patra <atish.patra@wdc.com>,
Alan Kao <alankao@andestech.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Allison Randal <allison@lohutok.net>,
Anup Patel <anup.patel@wdc.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Johan Hovold <johan@kernel.org>,
linux-riscv@lists.infradead.org,
Palmer Dabbelt <palmer@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>
Subject: [PATCH 1/4] RISC-V: Remove per cpu clocksource
Date: Fri, 26 Jul 2019 12:46:35 -0700 [thread overview]
Message-ID: <20190726194638.8068-1-atish.patra@wdc.com> (raw)
There is only one clocksource in RISC-V. The boot cpu initializes
that clocksource. No need to keep a percpu data structure.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
drivers/clocksource/timer-riscv.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index 5e6038fbf115..09e031176bc6 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -55,7 +55,7 @@ static u64 riscv_sched_clock(void)
return get_cycles64();
}
-static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
+static struct clocksource riscv_clocksource = {
.name = "riscv_clocksource",
.rating = 300,
.mask = CLOCKSOURCE_MASK(64),
@@ -92,7 +92,6 @@ void riscv_timer_interrupt(void)
static int __init riscv_timer_init_dt(struct device_node *n)
{
int cpuid, hartid, error;
- struct clocksource *cs;
hartid = riscv_of_processor_hartid(n);
if (hartid < 0) {
@@ -112,8 +111,7 @@ static int __init riscv_timer_init_dt(struct device_node *n)
pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
__func__, cpuid, hartid);
- cs = per_cpu_ptr(&riscv_clocksource, cpuid);
- error = clocksource_register_hz(cs, riscv_timebase);
+ error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
if (error) {
pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
error, cpuid);
--
2.21.0
next reply other threads:[~2019-07-26 19:46 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-26 19:46 Atish Patra [this message]
2019-07-26 19:46 ` [PATCH 2/4] RISC-V: Add riscv_isa reprensenting ISA features common across CPUs Atish Patra
2019-07-26 19:46 ` [PATCH 3/4] RISC-V: Support case insensitive ISA string parsing Atish Patra
2019-07-26 20:47 ` Paul Walmsley
2019-07-26 22:20 ` Atish Patra
2019-07-26 23:29 ` Paul Walmsley
2019-07-27 2:23 ` Anup Patel
2019-07-27 7:52 ` Paul Walmsley
2019-07-27 8:05 ` Anup Patel
2019-07-27 8:16 ` Paul Walmsley
2019-07-27 8:49 ` Anup Patel
2019-07-29 14:03 ` Andreas Schwab
2019-07-30 22:58 ` Paul Walmsley
2019-07-29 18:31 ` Atish Patra
2019-07-31 0:08 ` Paul Walmsley
2019-07-31 0:34 ` Atish Patra
2019-07-30 3:42 ` Palmer Dabbelt
2019-07-30 20:41 ` Atish Patra
2019-07-26 19:46 ` [PATCH 4/4] RISC-V: Fix unsupported isa string info Atish Patra
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