From: Atish Patra <atish.patra@wdc.com>
To: linux-kernel@vger.kernel.org
Cc: Atish Patra <atish.patra@wdc.com>,
Alan Kao <alankao@andestech.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Allison Randal <allison@lohutok.net>,
Anup Patel <anup.patel@wdc.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Johan Hovold <johan@kernel.org>,
linux-riscv@lists.infradead.org,
Palmer Dabbelt <palmer@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>
Subject: [PATCH 3/4] RISC-V: Support case insensitive ISA string parsing.
Date: Fri, 26 Jul 2019 12:46:37 -0700 [thread overview]
Message-ID: <20190726194638.8068-3-atish.patra@wdc.com> (raw)
In-Reply-To: <20190726194638.8068-1-atish.patra@wdc.com>
As per riscv specification, ISA naming strings are
case insensitive. However, currently only lower case
strings are parsed during cpu procfs.
Support parsing of upper case letters as well.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/kernel/cpu.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index 7da3c6a93abd..185143478830 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -5,6 +5,7 @@
#include <linux/init.h>
#include <linux/seq_file.h>
+#include <linux/ctype.h>
#include <linux/of.h>
#include <asm/smp.h>
@@ -57,10 +58,10 @@ static void print_isa(struct seq_file *f, const char *orig_isa)
* kernels on harts with the same ISA that the kernel is compiled for.
*/
#if defined(CONFIG_32BIT)
- if (strncmp(isa, "rv32i", 5) != 0)
+ if (strncasecmp(isa, "rv32i", 5) != 0)
return;
#elif defined(CONFIG_64BIT)
- if (strncmp(isa, "rv64i", 5) != 0)
+ if (strncasecmp(isa, "rv64i", 5) != 0)
return;
#endif
@@ -76,8 +77,8 @@ static void print_isa(struct seq_file *f, const char *orig_isa)
* extension from userspace as it's not accessible from there.
*/
for (e = ext; *e != '\0'; ++e) {
- if (isa[0] == e[0]) {
- if (isa[0] != 's')
+ if (tolower(isa[0]) == e[0]) {
+ if (tolower(isa[0] != 's'))
seq_write(f, isa, 1);
isa++;
--
2.21.0
next prev parent reply other threads:[~2019-07-26 19:46 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-26 19:46 [PATCH 1/4] RISC-V: Remove per cpu clocksource Atish Patra
2019-07-26 19:46 ` [PATCH 2/4] RISC-V: Add riscv_isa reprensenting ISA features common across CPUs Atish Patra
2019-07-26 19:46 ` Atish Patra [this message]
2019-07-26 20:47 ` [PATCH 3/4] RISC-V: Support case insensitive ISA string parsing Paul Walmsley
2019-07-26 22:20 ` Atish Patra
2019-07-26 23:29 ` Paul Walmsley
2019-07-27 2:23 ` Anup Patel
2019-07-27 7:52 ` Paul Walmsley
2019-07-27 8:05 ` Anup Patel
2019-07-27 8:16 ` Paul Walmsley
2019-07-27 8:49 ` Anup Patel
2019-07-29 14:03 ` Andreas Schwab
2019-07-30 22:58 ` Paul Walmsley
2019-07-29 18:31 ` Atish Patra
2019-07-31 0:08 ` Paul Walmsley
2019-07-31 0:34 ` Atish Patra
2019-07-30 3:42 ` Palmer Dabbelt
2019-07-30 20:41 ` Atish Patra
2019-07-26 19:46 ` [PATCH 4/4] RISC-V: Fix unsupported isa string info Atish Patra
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