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[216.228.112.22]) by smtp.gmail.com with ESMTPSA id w2sm78210147pgc.32.2019.08.06.18.11.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 06 Aug 2019 18:11:28 -0700 (PDT) Date: Tue, 6 Aug 2019 18:12:23 -0700 From: Nicolin Chen To: Daniel Baluta Cc: Mark Brown , Daniel Baluta , Devicetree List , Linux-ALSA , Pengutronix Kernel Team , Timur Tabi , Rob Herring , "S.j. Wang" , "Angus Ainslie (Purism)" , Takashi Iwai , Linux Kernel Mailing List , dl-linux-imx , Viorel Suman , Fabio Estevam , Mihai Serban , Lucas Stach Subject: Re: [alsa-devel] [PATCH v2 1/7] ASoC: fsl_sai: Add registers definition for multiple datalines Message-ID: <20190807011222.GB8938@Asurada-Nvidia.nvidia.com> References: <20190728192429.1514-1-daniel.baluta@nxp.com> <20190728192429.1514-2-daniel.baluta@nxp.com> <20190729194214.GA20594@Asurada-Nvidia.nvidia.com> <20190729202001.GC4787@sirena.org.uk> <20190730075934.GA5892@Asurada> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 06, 2019 at 02:15:03PM +0300, Daniel Baluta wrote: > On Tue, Jul 30, 2019 at 10:59 AM Nicolin Chen wrote: > > > > On Mon, Jul 29, 2019 at 09:20:01PM +0100, Mark Brown wrote: > > > On Mon, Jul 29, 2019 at 10:57:43PM +0300, Daniel Baluta wrote: > > > > On Mon, Jul 29, 2019 at 10:42 PM Nicolin Chen wrote: > > > > > On Sun, Jul 28, 2019 at 10:24:23PM +0300, Daniel Baluta wrote: > > > > > > > > > @@ -704,7 +711,14 @@ static bool fsl_sai_readable_reg(struct device *dev, unsigned int reg) > > > > > > case FSL_SAI_TCR3: > > > > > > case FSL_SAI_TCR4: > > > > > > case FSL_SAI_TCR5: > > > > > > - case FSL_SAI_TFR: > > > > > > + case FSL_SAI_TFR0: > > > > > > > > A tricky thing here is that those SAI instances on older SoC don't > > > > > support multi data lines physically, while seemly having registers > > > > > pre-defined. So your change doesn't sound doing anything wrong to > > > > > them at all, I am still wondering if it is necessary to apply them > > > > > to newer compatible only though, as for older compatibles of SAI, > > > > > these registers would be useless and confusing if being exposed. > > > > > > > > What do you think? > > > > > > > Yes, I thought about this too. But, I tried to keep the code as short > > > > as possible and technically it is not wrong. When 1 data line is supported > > > > for example application will only care about TDR0, TFR0, etc. > > > > > > So long as it's safe to read the registers (you don't get a bus error or > > > anything) I'd say it's more trouble than it's worth to have separate > > > regmap configuations just for this. The main reasons for restricting > > > readability are where there's physical problems with doing the reads or > > > to keep the size of the debugfs files under control for usability and > > > performance reasons. > > > > Thanks for the input, Mark. > > > > Daniel, did you get a chance to test it on older SoCs? At least > > nothing breaks like bus errors? > > Tested on imx6sx-sdb, everything looks good. No bus errors. Okay. Let's just stick to it then. Thanks for the reply.