From: Vidya Sagar <vidyas@nvidia.com>
To: <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
<robh+dt@kernel.org>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>
Cc: <kishon@ti.com>, <gustavo.pimentel@synopsys.com>,
<digetx@gmail.com>, <mperttunen@nvidia.com>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
<mmaddireddy@nvidia.com>, <vidyas@nvidia.com>,
<sagar.tv@gmail.com>
Subject: [PATCH 3/6] PCI: tegra: Add support to configure sideband pins
Date: Mon, 26 Aug 2019 13:01:40 +0530 [thread overview]
Message-ID: <20190826073143.4582-4-vidyas@nvidia.com> (raw)
In-Reply-To: <20190826073143.4582-1-vidyas@nvidia.com>
Add support to configure sideband signal pins when information is present
in respective controller's device-tree node.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
drivers/pci/controller/dwc/pcie-tegra194.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index fc0dbeb31d78..8a27b25893c9 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1308,6 +1308,12 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
return ret;
}
+ ret = pinctrl_pm_select_default_state(pcie->dev);
+ if (ret < 0) {
+ dev_err(pcie->dev, "Failed to configure sideband pins\n");
+ return ret;
+ }
+
tegra_pcie_init_controller(pcie);
pcie->link_state = tegra_pcie_dw_link_up(&pcie->pci);
--
2.17.1
next prev parent reply other threads:[~2019-08-26 7:32 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-26 7:31 [PATCH 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 in p2972-0000 platform Vidya Sagar
2019-08-26 7:31 ` [PATCH 1/6] dt-bindings: PCI: tegra: Add sideband pins configuration entries Vidya Sagar
2019-08-26 7:31 ` [PATCH 2/6] arm64: tegra: Add configuration for PCIe C5 sideband signals Vidya Sagar
2019-08-26 7:31 ` Vidya Sagar [this message]
2019-08-27 15:30 ` [PATCH 3/6] PCI: tegra: Add support to configure sideband pins Andrew Murray
2019-08-27 15:40 ` Vidya Sagar
2019-08-26 7:31 ` [PATCH 4/6] dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries Vidya Sagar
2019-08-26 7:31 ` [PATCH 5/6] arm64: tegra: Add PCIe slot supply information in p2972-0000 platform Vidya Sagar
2019-08-26 7:31 ` [PATCH 6/6] PCI: tegra: Add support to enable slot regulators Vidya Sagar
2019-08-27 15:47 ` Andrew Murray
2019-08-27 16:24 ` Vidya Sagar
2019-08-27 17:13 ` Andrew Murray
2019-08-28 9:07 ` Thierry Reding
2019-08-28 9:37 ` Andrew Murray
2019-08-28 9:10 ` [PATCH 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 in p2972-0000 platform Thierry Reding
2019-08-28 10:04 ` Vidya Sagar
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