From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: linux-mips@vger.kernel.org
Cc: chenhc@lemote.com, paul.burton@mips.com, tglx@linutronix.de,
jason@lakedaemon.net, maz@kernel.org,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
mark.rutland@arm.co, devicetree@vger.kernel.org,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: [PATCH v1 08/18] dt-bindings: interrupt-controller: Add Loongson-3 HTINTC
Date: Fri, 30 Aug 2019 12:32:22 +0800 [thread overview]
Message-ID: <20190830043232.20191-3-jiaxun.yang@flygoat.com> (raw)
In-Reply-To: <20190830043232.20191-1-jiaxun.yang@flygoat.com>
Document Loongson-3 HyperTransport Interrupt controller.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
.../loongson,ls3-htintc.yaml | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-htintc.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-htintc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-htintc.yaml
new file mode 100644
index 000000000000..51fee46ab060
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-htintc.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/interrupt-controller/loongson,ls3-htintc.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Loongson-3 HyperTransport Interrupt Controller
+
+maintainers:
+ - Jiaxun Yang <jiaxun.yang@flygoat.com>
+
+description: |
+ This interrupt controller is found in the Loongson-3 family of chips to transfer
+ interrupts from PCH connected on HyperTransport bus.
+
+properties:
+ compatible:
+ const: loongson,ls3-htintc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 4
+ description: |
+ Four parent interrupts that recieve chained interrupt randomly.
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - '#interrupt-cells'
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ htintc: interrupt-controller@fb000080 {
+ compatible = "loongson,ls3-htintc";
+ reg = <0xfb000080 0x100>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&iointc>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
+ <25 IRQ_TYPE_LEVEL_HIGH>,
+ <26 IRQ_TYPE_LEVEL_HIGH>,
+ <27 IRQ_TYPE_LEVEL_HIGH>;
+ };
+...
--
2.22.0
next prev parent reply other threads:[~2019-08-30 4:33 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-30 4:32 [PATCH v1 06/18] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 07/18] irqchip: Add driver for Loongson-3 HyperTransport interrupt controller Jiaxun Yang
2019-08-30 4:32 ` Jiaxun Yang [this message]
2019-09-02 13:39 ` [PATCH v1 08/18] dt-bindings: interrupt-controller: Add Loongson-3 HTINTC Rob Herring
2019-08-30 4:32 ` [PATCH v1 09/18] irqchip: i8259: Add plat-poll support Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 10/18] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 11/18] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 12/18] dt-bindings: mips: Add loongson cpus & boards Jiaxun Yang
2019-09-13 14:36 ` Rob Herring
2019-08-30 4:32 ` [PATCH v1 13/18] dt-bindings: Document loongson vendor-prefix Jiaxun Yang
2019-09-02 13:39 ` Rob Herring
2019-08-30 4:32 ` [PATCH v1 14/18] MIPS: Loongson64: Add generic dts Jiaxun Yang
[not found] ` <tencent_1942EDDF41E4786E357A4E9D@qq.com>
2019-09-04 6:08 ` Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 15/18] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 16/18] MIPS: Loongson: Regenerate defconfigs Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 17/18] MAINTAINERS: Add new pathes to LOONGSON64 ARCHITECTURE Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 18/18] MAINTAINERS: Add myself as maintainer of LOONGSON64 Jiaxun Yang
2019-09-02 13:38 ` [PATCH v1 06/18] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC Rob Herring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190830043232.20191-3-jiaxun.yang@flygoat.com \
--to=jiaxun.yang@flygoat.com \
--cc=chenhc@lemote.com \
--cc=devicetree@vger.kernel.org \
--cc=jason@lakedaemon.net \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=mark.rutland@arm.co \
--cc=maz@kernel.org \
--cc=paul.burton@mips.com \
--cc=robh+dt@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).