From: <Tudor.Ambarus@microchip.com>
To: <miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>,
<boris.brezillon@collabora.com>
Cc: <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<Tudor.Ambarus@microchip.com>
Subject: [PATCH v3 15/32] mtd: spi-nor: Check for errors after each Register Operation
Date: Tue, 29 Oct 2019 11:17:12 +0000 [thread overview]
Message-ID: <20191029111615.3706-16-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20191029111615.3706-1-tudor.ambarus@microchip.com>
From: Tudor Ambarus <tudor.ambarus@microchip.com>
Check for the return vales of each Register Operation.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/spi-nor.c | 81 ++++++++++++++++++++++++++++++++-----------
1 file changed, 60 insertions(+), 21 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 889fd77dbe96..21f01fdcfa16 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -595,11 +595,15 @@ static int st_micron_set_4byte(struct spi_nor *nor, bool enable)
{
int ret;
- spi_nor_write_enable(nor);
+ ret == spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+
ret = macronix_set_4byte(nor, enable);
- spi_nor_write_disable(nor);
+ if (ret)
+ return ret;
- return ret;
+ return spi_nor_write_disable(nor);
}
static int spansion_set_4byte(struct spi_nor *nor, bool enable)
@@ -665,11 +669,15 @@ static int winbond_set_4byte(struct spi_nor *nor, bool enable)
* Register to be set to 1, so all 3-byte-address reads come from the
* second 16M. We must clear the register to enable normal behavior.
*/
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+
ret = spi_nor_write_ear(nor, 0);
- spi_nor_write_disable(nor);
+ if (ret)
+ return ret;
- return ret;
+ return spi_nor_write_disable(nor);
}
static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
@@ -855,7 +863,9 @@ static int spi_nor_write_sr_cr(struct spi_nor *nor, u8 *sr_cr)
{
int ret;
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
if (nor->spimem) {
struct spi_mem_op op =
@@ -885,7 +895,10 @@ static int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 status_new,
{
int ret;
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+
ret = spi_nor_write_sr(nor, status_new);
if (ret)
return ret;
@@ -1393,7 +1406,9 @@ static int spi_nor_erase_multi_sectors(struct spi_nor *nor, u64 addr, u32 len)
list_for_each_entry_safe(cmd, next, &erase_list, list) {
nor->erase_opcode = cmd->opcode;
while (cmd->count) {
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ goto destroy_erase_cmd_list;
ret = spi_nor_erase_sector(nor, addr);
if (ret)
@@ -1448,7 +1463,9 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
if (len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) {
unsigned long timeout;
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ goto erase_err;
ret = spi_nor_erase_chip(nor);
if (ret)
@@ -1475,7 +1492,9 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
/* "sector"-at-a-time erase */
} else if (spi_nor_has_uniform_erase(nor)) {
while (len) {
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ goto erase_err;
ret = spi_nor_erase_sector(nor, addr);
if (ret)
@@ -1496,7 +1515,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
goto erase_err;
}
- spi_nor_write_disable(nor);
+ ret = spi_nor_write_disable(nor);
erase_err:
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE);
@@ -1845,9 +1864,13 @@ static int macronix_quad_enable(struct spi_nor *nor)
if (nor->bouncebuf[0] & SR_QUAD_EN_MX)
return 0;
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
- spi_nor_write_sr(nor, nor->bouncebuf[0] | SR_QUAD_EN_MX);
+ ret = spi_nor_write_sr(nor, nor->bouncebuf[0] | SR_QUAD_EN_MX);
+ if (ret)
+ return ret;
ret = spi_nor_wait_till_ready(nor);
if (ret)
@@ -2018,7 +2041,9 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor)
/* Update the Quad Enable bit. */
*sr2 |= SR2_QUAD_EN_BIT7;
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
ret = spi_nor_write_sr2(nor, sr2);
if (ret)
@@ -2059,7 +2084,9 @@ static int spi_nor_clear_sr_bp(struct spi_nor *nor)
if (ret)
return ret;
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
ret = spi_nor_write_sr(nor, nor->bouncebuf[0] & ~mask);
if (ret)
@@ -2676,7 +2703,9 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
if (ret)
return ret;
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ goto sst_write_err;
nor->sst_write_second = false;
@@ -2714,14 +2743,19 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
}
nor->sst_write_second = false;
- spi_nor_write_disable(nor);
+ ret = spi_nor_write_disable(nor);
+ if (ret)
+ goto sst_write_err;
+
ret = spi_nor_wait_till_ready(nor);
if (ret)
goto sst_write_err;
/* Write out trailing byte if it exists. */
if (actual != len) {
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ goto sst_write_err;
nor->program_opcode = SPINOR_OP_BP;
ret = spi_nor_write_data(nor, to, 1, buf + actual);
@@ -2731,8 +2765,10 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
ret = spi_nor_wait_till_ready(nor);
if (ret)
goto sst_write_err;
- spi_nor_write_disable(nor);
+
actual += 1;
+
+ ret = spi_nor_write_disable(nor);
}
sst_write_err:
*retlen += actual;
@@ -2783,7 +2819,10 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
addr = spi_nor_convert_addr(nor, addr);
- spi_nor_write_enable(nor);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ goto write_err;
+
ret = spi_nor_write_data(nor, addr, page_remain, buf + i);
if (ret < 0)
goto write_err;
--
2.9.5
next prev parent reply other threads:[~2019-10-29 11:18 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-29 11:16 [PATCH v3 00/32] mtd: spi-nor: Quad Enable and (un)lock methods Tudor.Ambarus
2019-10-29 11:16 ` [PATCH v3 01/32] mtd: spi-nor: Prepend spi_nor_ to all Reg Ops methods Tudor.Ambarus
2019-10-31 10:34 ` Boris Brezillon
2019-11-02 10:34 ` Tudor.Ambarus
2019-10-29 11:16 ` [PATCH v3 02/32] mtd: spi-nor: Drop duplicated new line Tudor.Ambarus
2019-10-31 10:34 ` Boris Brezillon
2019-11-02 10:34 ` Tudor.Ambarus
2019-10-29 11:16 ` [PATCH v3 03/32] mtd: spi-nor: Group all Reg Ops to avoid forward declarations Tudor.Ambarus
2019-10-31 10:35 ` Boris Brezillon
2019-11-02 10:35 ` Tudor.Ambarus
2019-10-29 11:16 ` [PATCH v3 04/32] mtd: spi-nor: Stop compare with negative in Reg Ops methods Tudor.Ambarus
2019-10-31 10:36 ` Boris Brezillon
2019-11-02 10:36 ` Tudor.Ambarus
2019-10-29 11:16 ` [PATCH v3 05/32] mtd: spi-nor: Drop explicit cast to int to already int value Tudor.Ambarus
2019-10-31 10:36 ` Boris Brezillon
2019-11-02 10:37 ` Tudor.Ambarus
2019-10-29 11:16 ` [PATCH v3 06/32] mtd: spi-nor: Use dev_err() instead of pr_err() Tudor.Ambarus
2019-10-31 10:43 ` Boris Brezillon
2019-11-02 10:38 ` Tudor.Ambarus
2019-10-29 11:16 ` [PATCH v3 07/32] mtd: spi-nor: Don't overwrite errno from Reg Ops Tudor.Ambarus
2019-10-31 10:48 ` Boris Brezillon
2019-11-02 10:39 ` Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 08/32] mtd: spi-nor: Pointer parameter for SR in spi_nor_read_sr() Tudor.Ambarus
2019-10-31 10:51 ` Boris Brezillon
2019-11-02 10:42 ` Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 09/32] mtd: spi-nor: Pointer parameter for FSR in spi_nor_read_fsr() Tudor.Ambarus
2019-10-31 10:53 ` Boris Brezillon
2019-11-02 10:44 ` Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 10/32] mtd: spi-nor: Pointer parameter for CR in spi_nor_read_cr() Tudor.Ambarus
2019-10-31 10:58 ` Boris Brezillon
2019-10-31 14:26 ` Tudor.Ambarus
2019-11-02 10:45 ` Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 11/32] mtd: spi-nor: Drop redundant error reports in Reg Ops callers Tudor.Ambarus
2019-10-31 10:59 ` Boris Brezillon
2019-11-02 10:46 ` Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 12/32] mtd: spi-nor: Void return type for spi_nor_clear_sr/fsr() Tudor.Ambarus
2019-10-31 11:02 ` Boris Brezillon
2019-10-29 11:17 ` [PATCH v3 13/32] mtd: spi-nor: Print error messages inside Reg Ops methods Tudor.Ambarus
2019-10-31 11:05 ` Boris Brezillon
2019-10-31 14:18 ` Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 14/32] mtd: spi-nor: Fix retlen handling in sst_write() Tudor.Ambarus
2019-10-31 11:12 ` Boris Brezillon
2019-11-02 10:47 ` Tudor.Ambarus
2019-10-29 11:17 ` Tudor.Ambarus [this message]
2019-10-31 6:57 ` [PATCH v3 15/32] mtd: spi-nor: Check for errors after each Register Operation Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 16/32] mtd: spi-nor: Rename label as it is no longer generic Tudor.Ambarus
2019-10-31 11:14 ` Boris Brezillon
2019-10-29 11:17 ` [PATCH v3 17/32] mtd: spi-nor: Move the WE and wait calls inside Write SR methods Tudor.Ambarus
2019-10-31 11:15 ` Boris Brezillon
2019-10-29 11:17 ` [PATCH v3 18/32] mtd: spi-nor: Constify data to write to the Status Register Tudor.Ambarus
2019-10-31 11:16 ` Boris Brezillon
2019-11-02 10:48 ` Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 19/32] mtd: spi-nor: Merge spi_nor_write_sr() and spi_nor_write_sr_cr() Tudor.Ambarus
2019-10-31 11:17 ` Boris Brezillon
2019-10-29 11:17 ` [PATCH v3 20/32] mtd: spi-nor: Describe all the Reg Ops Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 21/32] mtd: spi-nor: Drop spansion_quad_enable() Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 22/32] mtd: spi-nor: Fix errno on Quad Enable methods Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 23/32] mtd: spi-nor: Check all the bits written, not just the BP ones Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 24/32] mtd: spi-nor: Print error message when the read back test fails Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 25/32] mtd: spi-nor: Fix clearing of QE bit on lock()/unlock() Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 26/32] mtd: spi-nor: Extend the QE Read Back test to the entire SR byte Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 27/32] mtd: spi-nor: Extend the QE Read Back test to both SR1 and SR2 Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 28/32] mtd: spi-nor: Rename CR_QUAD_EN_SPAN to SR2_QUAD_EN_BIT1 Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 29/32] mtd: spi-nor: Merge spansion Quad Enable methods Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 30/32] mtd: spi-nor: Rename macronix_quad_enable to spi_nor_sr1_bit6_quad_enable Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 31/32] mtd: spi-nor: Prepend "spi_nor_" to "sr2_bit7_quad_enable" Tudor.Ambarus
2019-10-29 11:17 ` [PATCH v3 32/32] mtd: spi-nor: Rework the disabling of block write protection Tudor.Ambarus
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