From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
To: andrew.murray@arm.com, maz@kernel.org,
linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Eric Anholt <eric@anholt.net>, Stefan Wahren <wahrenst@gmx.net>
Cc: james.quinlan@broadcom.com, mbrugger@suse.com,
f.fainelli@gmail.com, phil@raspberrypi.org,
jeremy.linton@arm.com,
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
devicetree@vger.kernel.org,
bcm-kernel-feedback-list@broadcom.com,
linux-rpi-kernel@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/6] ARM: dts: bcm2711: Enable PCIe controller
Date: Tue, 12 Nov 2019 16:59:22 +0100 [thread overview]
Message-ID: <20191112155926.16476-4-nsaenzjulienne@suse.de> (raw)
In-Reply-To: <20191112155926.16476-1-nsaenzjulienne@suse.de>
This enables bcm2711's PCIe bus, which is hardwired to a VIA
Technologies XHCI USB 3.0 controller.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
Changes since v1:
- remove linux,pci-domain
---
arch/arm/boot/dts/bcm2711.dtsi | 46 ++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
index 667658497898..664fefb2011e 100644
--- a/arch/arm/boot/dts/bcm2711.dtsi
+++ b/arch/arm/boot/dts/bcm2711.dtsi
@@ -288,6 +288,52 @@ IRQ_TYPE_LEVEL_LOW)>,
arm,cpu-registers-not-fw-configured;
};
+ scb {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>,
+ <0x6 0x00000000 0x6 0x00000000 0x40000000>;
+
+ pcie_0: pcie@7d500000 {
+ compatible = "brcm,bcm2711-pcie";
+ reg = <0x0 0x7d500000 0x9310>;
+ msi-controller;
+ msi-parent = <&pcie_0>;
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ brcm,enable-ssc;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pcie", "msi";
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
+ IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 2 &gicv2 GIC_SPI 144
+ IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 3 &gicv2 GIC_SPI 145
+ IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 4 &gicv2 GIC_SPI 146
+ IRQ_TYPE_LEVEL_HIGH>;
+
+ ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
+ 0x0 0x04000000>;
+ /*
+ * The wrapper around the PCIe block has a bug
+ * preventing it from accessing beyond the first 3GB of
+ * memory. As the bus DMA mask is rounded up to the
+ * closest power of two of the dma-range size, we're
+ * forced to set the limit at 2GB. This can be
+ * harmlessly changed in the future once the DMA code
+ * handles non power of two DMA limits.
+ */
+ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
+ 0x0 0x80000000>;
+ };
+ };
+
cpus: cpus {
#address-cells = <1>;
#size-cells = <0>;
--
2.24.0
next prev parent reply other threads:[~2019-11-12 16:00 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-12 15:59 [PATCH v2 0/6] Raspberry Pi 4 PCIe support Nicolas Saenz Julienne
2019-11-12 15:59 ` [PATCH v2 1/6] linux/log2.h: Add roundup/rounddown_pow_two64() family of functions Nicolas Saenz Julienne
2019-11-19 11:13 ` Andrew Murray
2019-11-19 11:30 ` Nicolas Saenz Julienne
2019-11-19 12:43 ` Nicolas Saenz Julienne
2019-11-19 16:28 ` Andrew Murray
2019-11-19 16:55 ` Jason Gunthorpe
2019-11-19 17:00 ` Andrew Murray
2019-11-12 15:59 ` [PATCH v2 2/6] dt-bindings: PCI: Add bindings for brcmstb's PCIe device Nicolas Saenz Julienne
2019-11-18 21:23 ` Rob Herring
2019-11-19 9:35 ` Nicolas Saenz Julienne
2019-11-19 11:17 ` Andrew Murray
2019-11-19 11:28 ` Nicolas Saenz Julienne
2019-11-12 15:59 ` Nicolas Saenz Julienne [this message]
2019-11-12 15:59 ` [PATCH v2 4/6] PCI: brcmstb: add Broadcom STB PCIe host controller driver Nicolas Saenz Julienne
2019-11-19 16:25 ` Andrew Murray
2019-11-19 18:20 ` Jeremy Linton
2019-11-20 20:24 ` Nicolas Saenz Julienne
2019-11-19 18:34 ` Florian Fainelli
2019-11-21 12:16 ` Andrew Murray
2019-11-20 19:53 ` Nicolas Saenz Julienne
2019-11-21 12:03 ` Andrew Murray
2019-11-21 12:59 ` Nicolas Saenz Julienne
2019-11-21 15:44 ` Andrew Murray
2019-11-21 21:07 ` Jim Quinlan
2019-11-22 14:59 ` Robin Murphy
2019-11-21 13:26 ` Nicolas Saenz Julienne
2019-11-21 15:46 ` Andrew Murray
2019-11-12 15:59 ` [PATCH v2 5/6] PCI: brcmstb: add MSI capability Nicolas Saenz Julienne
2019-11-13 13:49 ` Marc Zyngier
2019-11-21 15:38 ` Andrew Murray
2019-11-21 17:19 ` Nicolas Saenz Julienne
2019-11-12 15:59 ` [PATCH v2 6/6] MAINTAINERS: Add brcmstb PCIe controller Nicolas Saenz Julienne
2019-11-19 11:18 ` [PATCH v2 0/6] Raspberry Pi 4 PCIe support Andrew Murray
2019-11-19 11:49 ` Nicolas Saenz Julienne
2019-11-21 12:18 ` Andrew Murray
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