From: Lyude Paul <lyude@redhat.com>
To: nouveau@lists.freedesktop.org
Cc: "Daniel Vetter" <daniel@ffwll.ch>,
"Dave Airlie" <airlied@redhat.com>,
"David Airlie" <airlied@linux.ie>, "Takashi Iwai" <tiwai@suse.de>,
"Manasi Navare" <manasi.d.navare@intel.com>,
"Sean Paul" <seanpaul@chromium.org>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
"Ben Skeggs" <bskeggs@redhat.com>,
"Lyude Paul" <lyude@redhat.com>,
"Mikita Lipski" <mikita.lipski@amd.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Jani Nikula" <jani.nikula@intel.com>,
"Ilia Mirkin" <imirkin@alum.mit.edu>,
"Alex Deucher" <alexander.deucher@amd.com>
Subject: [PATCH v2 0/5] drm/nouveau: DP interlace fixes
Date: Fri, 14 Feb 2020 17:58:51 -0500 [thread overview]
Message-ID: <20200214225910.695210-1-lyude@redhat.com> (raw)
Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.
So, let's teach nouveau to reject interlaced modes on hardware that
can't actually handle it. Additionally for MST, since we accomplish this
by simply reusing more of the SST mode validation we also get (some)
basic bw validation for modes we detect on MST connectors completely for
free.
Lyude Paul (5):
drm/nouveau/kms/nv50-: Initialize core channel in
nouveau_display_create()
drm/nouveau/kms/nv50-: Probe SOR caps for DP interlacing support
drm/nouveau/kms/gv100-: Add support for interlaced modes
drm/nouveau/kms/nv50-: Move 8BPC limit for MST into
nv50_mstc_get_modes()
drm/nouveau/kms/nv50-: Share DP SST mode_valid() handling with MST
drivers/gpu/drm/nouveau/dispnv50/core.h | 3 ++
drivers/gpu/drm/nouveau/dispnv50/core507d.c | 15 ++++++
drivers/gpu/drm/nouveau/dispnv50/core827d.c | 1 +
drivers/gpu/drm/nouveau/dispnv50/core907d.c | 1 +
drivers/gpu/drm/nouveau/dispnv50/core917d.c | 1 +
drivers/gpu/drm/nouveau/dispnv50/corec37d.c | 26 +++++++++
drivers/gpu/drm/nouveau/dispnv50/corec57d.c | 1 +
drivers/gpu/drm/nouveau/dispnv50/disp.c | 60 ++++++++++++++++-----
drivers/gpu/drm/nouveau/dispnv50/disp.h | 1 +
drivers/gpu/drm/nouveau/dispnv50/headc37d.c | 5 +-
drivers/gpu/drm/nouveau/dispnv50/headc57d.c | 5 +-
drivers/gpu/drm/nouveau/nouveau_connector.c | 43 +++++++++------
drivers/gpu/drm/nouveau/nouveau_connector.h | 5 ++
drivers/gpu/drm/nouveau/nouveau_dp.c | 31 +++++++++++
drivers/gpu/drm/nouveau/nouveau_encoder.h | 8 +++
15 files changed, 172 insertions(+), 34 deletions(-)
--
2.24.1
next reply other threads:[~2020-02-14 22:59 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-14 22:58 Lyude Paul [this message]
2020-02-14 22:58 ` [PATCH v2 1/5] drm/nouveau/kms/nv50-: Initialize core channel in nouveau_display_create() Lyude Paul
2020-02-14 22:58 ` [PATCH v2 2/5] drm/nouveau/kms/nv50-: Probe SOR caps for DP interlacing support Lyude Paul
2020-02-14 22:58 ` [PATCH v2 3/5] drm/nouveau/kms/gv100-: Add support for interlaced modes Lyude Paul
2020-02-14 22:58 ` [PATCH v2 4/5] drm/nouveau/kms/nv50-: Move 8BPC limit for MST into nv50_mstc_get_modes() Lyude Paul
2020-02-14 22:58 ` [PATCH v2 5/5] drm/nouveau/kms/nv50-: Share DP SST mode_valid() handling with MST Lyude Paul
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