From: Sibi Sankar <sibis@codeaurora.org>
To: robh+dt@kernel.org, georgi.djakov@linaro.org, evgreen@chromium.org
Cc: bjorn.andersson@linaro.org, agross@kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-msm@vger.kernel.org, mark.rutland@arm.com,
saravanak@google.com, viresh.kumar@linaro.org,
okukatla@codeaurora.org, Sibi Sankar <sibis@codeaurora.org>,
Rob Herring <robh@kernel.org>
Subject: [PATCH v5 2/7] dt-bindings: interconnect: Add OSM L3 DT bindings
Date: Thu, 27 Feb 2020 16:26:26 +0530 [thread overview]
Message-ID: <20200227105632.15041-3-sibis@codeaurora.org> (raw)
In-Reply-To: <20200227105632.15041-1-sibis@codeaurora.org>
Add bindings for Operating State Manager (OSM) L3 interconnect provider
on SDM845 SoCs.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
.../bindings/interconnect/qcom,osm-l3.yaml | 61 +++++++++++++++++++
.../dt-bindings/interconnect/qcom,osm-l3.h | 12 ++++
2 files changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
create mode 100644 include/dt-bindings/interconnect/qcom,osm-l3.h
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
new file mode 100644
index 0000000000000..b4d46a1e92573
--- /dev/null
+++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider
+
+maintainers:
+ - Sibi Sankar <sibis@codeaurora.org>
+
+description:
+ L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM.
+ The OSM L3 interconnect provider aggregates the L3 bandwidth requests
+ from CPU/GPU and relays it to the OSM.
+
+properties:
+ compatible:
+ enum:
+ - qcom,sdm845-osm-l3
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: xo clock
+ - description: alternate clock
+
+ clock-names:
+ items:
+ - const: xo
+ - const: alternate
+
+ '#interconnect-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - '#interconnect-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+
+ #define GPLL0 165
+ #define RPMH_CXO_CLK 0
+
+ osm_l3: interconnect@17d41000 {
+ compatible = "qcom,sdm845-osm-l3";
+ reg = <0x17d41000 0x1400>;
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
+ clock-names = "xo", "alternate";
+
+ #interconnect-cells = <1>;
+ };
diff --git a/include/dt-bindings/interconnect/qcom,osm-l3.h b/include/dt-bindings/interconnect/qcom,osm-l3.h
new file mode 100644
index 0000000000000..54858ff7674d7
--- /dev/null
+++ b/include/dt-bindings/interconnect/qcom,osm-l3.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 The Linux Foundation. All rights reserved.
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_OSM_L3_H
+#define __DT_BINDINGS_INTERCONNECT_QCOM_OSM_L3_H
+
+#define MASTER_OSM_L3_APPS 0
+#define SLAVE_OSM_L3 1
+
+#endif
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-02-27 10:56 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-27 10:56 [PATCH v5 0/7] Add OSM L3 Interconnect Provider Sibi Sankar
2020-02-27 10:56 ` [PATCH v5 1/7] interconnect: qcom: Allow icc node to be used across icc providers Sibi Sankar
2020-02-29 0:21 ` Evan Green
2020-02-27 10:56 ` Sibi Sankar [this message]
2020-02-27 10:56 ` [PATCH v5 3/7] interconnect: qcom: Add OSM L3 interconnect provider support Sibi Sankar
2020-02-29 0:10 ` Evan Green
2020-02-27 10:56 ` [PATCH v5 4/7] dt-bindings: interconnect: Add OSM L3 DT binding on SC7180 Sibi Sankar
2020-02-27 10:56 ` [PATCH v5 5/7] interconnect: qcom: Add OSM L3 support " Sibi Sankar
2020-02-29 0:10 ` Evan Green
2020-02-27 10:56 ` [PATCH v5 6/7] arm64: dts: qcom: sdm845: Add OSM L3 interconnect provider Sibi Sankar
2020-02-29 0:10 ` Evan Green
2020-03-04 16:32 ` Georgi Djakov
2020-02-27 10:56 ` [PATCH v5 7/7] arm64: dts: qcom: sc7180: " Sibi Sankar
2020-02-29 0:10 ` Evan Green
2020-03-04 16:33 ` Georgi Djakov
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