From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89086C10DCE for ; Fri, 6 Mar 2020 15:25:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5E6A72073B for ; Fri, 6 Mar 2020 15:25:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726485AbgCFPZh (ORCPT ); Fri, 6 Mar 2020 10:25:37 -0500 Received: from foss.arm.com ([217.140.110.172]:35422 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725922AbgCFPZg (ORCPT ); Fri, 6 Mar 2020 10:25:36 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5F33F30E; Fri, 6 Mar 2020 07:25:36 -0800 (PST) Received: from e121896.warwick.arm.com (e121896.warwick.arm.com [10.32.36.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E65D23F237; Fri, 6 Mar 2020 07:25:34 -0800 (PST) From: James Clark To: mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: nd@arm.com, James Clark Subject: [PATCH v6 0/3] perf tools: Add support for some spe events Date: Fri, 6 Mar 2020 15:25:17 +0000 Message-Id: <20200306152520.28233-1-james.clark@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200228160126.GI36089@lakrids.cambridge.arm.com> References: <20200228160126.GI36089@lakrids.cambridge.arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mark, Yes I think this is something I can look into. For now I have removed that last patch because the current patch set already works very similarly anyway and allows people to use SPE in perf: ./perf record -e arm_spe_0/branch_filter=1/ vs ./perf record -e arm_spe/branch-misses/pp Also I don't have access to any big.LITTLE hardware with SPE so wouldn't be able to test collating all the SPE PMUs. Thanks James Tan Xiaojun (3): perf tools: Move arm-spe-pkt-decoder.h/c to the new dir perf tools: Add support for "report" for some spe events perf report: Add SPE options to --itrace argument tools/perf/Documentation/itrace.txt | 5 +- tools/perf/util/Build | 2 +- tools/perf/util/arm-spe-decoder/Build | 1 + .../util/arm-spe-decoder/arm-spe-decoder.c | 225 ++++++ .../util/arm-spe-decoder/arm-spe-decoder.h | 66 ++ .../arm-spe-pkt-decoder.c | 0 .../arm-spe-pkt-decoder.h | 2 + tools/perf/util/arm-spe.c | 747 +++++++++++++++++- tools/perf/util/auxtrace.c | 13 + tools/perf/util/auxtrace.h | 13 +- 10 files changed, 1032 insertions(+), 42 deletions(-) create mode 100644 tools/perf/util/arm-spe-decoder/Build create mode 100644 tools/perf/util/arm-spe-decoder/arm-spe-decoder.c create mode 100644 tools/perf/util/arm-spe-decoder/arm-spe-decoder.h rename tools/perf/util/{ => arm-spe-decoder}/arm-spe-pkt-decoder.c (100%) rename tools/perf/util/{ => arm-spe-decoder}/arm-spe-pkt-decoder.h (96%) -- 2.17.1