From: Yang Weijiang <weijiang.yang@intel.com>
To: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: Yang Weijiang <weijiang.yang@intel.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
pbonzini@redhat.com, jmattson@google.com,
yu.c.zhang@linux.intel.com
Subject: Re: [PATCH v11 5/9] KVM: X86: Refresh CPUID once guest XSS MSR changes
Date: Fri, 24 Apr 2020 22:47:51 +0800 [thread overview]
Message-ID: <20200424144751.GJ24039@local-michael-cet-test> (raw)
In-Reply-To: <20200423173450.GJ17824@linux.intel.com>
On Thu, Apr 23, 2020 at 10:34:50AM -0700, Sean Christopherson wrote:
> On Thu, Mar 26, 2020 at 04:18:42PM +0800, Yang Weijiang wrote:
> > CPUID(0xd, 1) reports the current required storage size of
> > struct kvm_pio_request pio;
> > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> > index 78d461be2102..25e9a11291b3 100644
> > --- a/arch/x86/kvm/cpuid.c
> > +++ b/arch/x86/kvm/cpuid.c
> > @@ -95,9 +95,24 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu)
> > }
> >
> > best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
> > - if (best && (cpuid_entry_has(best, X86_FEATURE_XSAVES) ||
> > - cpuid_entry_has(best, X86_FEATURE_XSAVEC)))
> > - best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
> > + if (best) {
> > + if (best->eax & (F(XSAVES) | F(XSAVEC))) {
>
> Please use cpuid_entry_has() to preserve the automagic register lookup and
> compile-time assertions that are provided. E.g. I don't know off the top
> of my whether %eax is the correct register, and I don't want to know :-).
>
Got it, will fix it.
> > + u64 xstate = vcpu->arch.xcr0 | vcpu->arch.ia32_xss;
> > +
> > + best->ebx = xstate_required_size(xstate, true);
> > + }
> > +
> > + if (best->eax & F(XSAVES)) {
>
> Same thing here.
>
> > + vcpu->arch.guest_supported_xss =
> > + (best->ecx | ((u64)best->edx << 32)) & supported_xss;
>
> The indentation is funky, I'm guessing you're trying to squeak in less than
> 80 chars. Maybe this?
>
> if (!cpuid_entry_has(best, X86_FEATURE_XSAVES)) {
> best->ecx = 0;
> best->edx = 0;
> }
>
> vcpu->arch.guest_supported_xss =
> (((u64)best->edx << 32) | best->ecx) & supported_xss;
>
> Nit: my preference is to have the high half first, x86 is little endian
> (the xcr0 code is "wrong" :-D). For me, this also makes it more obvious
> that the effective size is a u64.
>
Good suggestion, will fixed it together the xcr0 part!
> > + } else {
> > + best->ecx = 0;
> > + best->edx = 0;
> > + vcpu->arch.guest_supported_xss = 0;
> > + }
> > + } else {
> > + vcpu->arch.guest_supported_xss = 0;
> > + }
> >
> > /*
> > * The existing code assumes virtual address is 48-bit or 57-bit in the
> > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> > index 90acdbbb8a5a..51ecb496d47d 100644
> > --- a/arch/x86/kvm/x86.c
> > +++ b/arch/x86/kvm/x86.c
> > @@ -2836,9 +2836,12 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> > * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
> > * XSAVES/XRSTORS to save/restore PT MSRs.
> > */
> > - if (data & ~supported_xss)
> > + if (data & ~vcpu->arch.guest_supported_xss)
> > return 1;
> > - vcpu->arch.ia32_xss = data;
> > + if (vcpu->arch.ia32_xss != data) {
> > + vcpu->arch.ia32_xss = data;
> > + kvm_update_cpuid(vcpu);
> > + }
> > break;
> > case MSR_SMI_COUNT:
> > if (!msr_info->host_initiated)
> > @@ -9635,6 +9638,8 @@ int kvm_arch_hardware_setup(void)
> >
> > if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
> > supported_xss = 0;
> > + else
> > + supported_xss = host_xss & KVM_SUPPORTED_XSS;
>
> Silly nit: I'd prefer to invert the check, e.g.
>
> if (kvm_cpu_cap_has(X86_FEATURE_XSAVES))
> supported_xss = host_xss & KVM_SUPPORTED_XSS;
> else
> supported_xss = 0;
Fair enough!
>
> >
> > cr4_reserved_bits = kvm_host_cr4_reserved_bits(&boot_cpu_data);
> >
> > --
> > 2.17.2
> >
next prev parent reply other threads:[~2020-04-24 14:45 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-26 8:18 [PATCH v11 0/9] Introduce support for guest CET feature Yang Weijiang
2020-03-26 8:18 ` [PATCH v11 1/9] KVM: VMX: Introduce CET VMX fields and flags Yang Weijiang
2020-04-23 16:07 ` Sean Christopherson
2020-04-24 13:39 ` Yang Weijiang
2020-04-23 16:39 ` Sean Christopherson
2020-04-24 13:44 ` Yang Weijiang
2020-03-26 8:18 ` [PATCH v11 2/9] KVM: VMX: Set guest CET MSRs per KVM and host configuration Yang Weijiang
2020-04-23 16:27 ` Sean Christopherson
2020-04-24 14:07 ` Yang Weijiang
2020-04-24 14:55 ` Sean Christopherson
2020-04-25 9:14 ` Yang Weijiang
2020-04-25 13:26 ` Paolo Bonzini
2020-04-26 15:26 ` Yang Weijiang
2020-03-26 8:18 ` [PATCH v11 3/9] KVM: VMX: Set host/guest CET states for vmexit/vmentry Yang Weijiang
2020-04-01 2:23 ` kbuild test robot
2020-04-23 17:17 ` Sean Christopherson
2020-04-24 14:35 ` Yang Weijiang
2020-04-24 14:49 ` Sean Christopherson
2020-04-25 9:20 ` Yang Weijiang
2020-04-27 17:04 ` Sean Christopherson
2020-04-27 17:56 ` Sean Christopherson
2020-03-26 8:18 ` [PATCH v11 4/9] KVM: VMX: Check CET dependencies on CR settings Yang Weijiang
2020-04-23 17:20 ` Sean Christopherson
2020-04-24 14:36 ` Yang Weijiang
2020-03-26 8:18 ` [PATCH v11 5/9] KVM: X86: Refresh CPUID once guest XSS MSR changes Yang Weijiang
2020-04-01 3:50 ` kbuild test robot
2020-04-23 17:34 ` Sean Christopherson
2020-04-24 14:47 ` Yang Weijiang [this message]
2020-04-25 13:19 ` Paolo Bonzini
2020-04-26 15:01 ` Yang Weijiang
2020-03-26 8:18 ` [PATCH v11 6/9] KVM: X86: Load guest fpu state when access MSRs managed by XSAVES Yang Weijiang
2020-03-26 8:18 ` [PATCH v11 7/9] KVM: X86: Add userspace access interface for CET MSRs Yang Weijiang
2020-03-28 7:40 ` kbuild test robot
2020-04-01 4:54 ` kbuild test robot
2020-04-23 18:14 ` Sean Christopherson
2020-04-24 15:02 ` Yang Weijiang
2020-04-24 15:10 ` Sean Christopherson
2020-04-25 9:28 ` Yang Weijiang
2020-04-25 15:31 ` Paolo Bonzini
2020-04-26 15:23 ` Yang Weijiang
2020-04-27 14:04 ` Paolo Bonzini
2020-04-28 13:41 ` Yang Weijiang
2020-03-26 8:18 ` [PATCH v11 8/9] KVM: VMX: Enable CET support for nested VM Yang Weijiang
2020-04-01 6:11 ` kbuild test robot
2020-04-23 18:29 ` Sean Christopherson
2020-04-24 15:24 ` Yang Weijiang
2020-03-26 8:18 ` [PATCH v11 9/9] KVM: X86: Set CET feature bits for CPUID enumeration Yang Weijiang
2020-03-27 4:41 ` kbuild test robot
2020-04-23 16:56 ` Sean Christopherson
2020-04-24 14:17 ` Yang Weijiang
2020-04-23 16:58 ` Sean Christopherson
2020-04-24 14:23 ` Yang Weijiang
2020-03-26 8:18 ` [kvm-unit-tests PATCH] x86: Add tests for user-mode CET Yang Weijiang
2020-04-23 15:51 ` [PATCH v11 0/9] Introduce support for guest CET feature Sean Christopherson
2020-04-24 13:31 ` Yang Weijiang
2020-04-23 16:03 ` Sean Christopherson
2020-04-24 13:34 ` Yang Weijiang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200424144751.GJ24039@local-michael-cet-test \
--to=weijiang.yang@intel.com \
--cc=jmattson@google.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=sean.j.christopherson@intel.com \
--cc=yu.c.zhang@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).