From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, "Paul E. McKenney" <paulmck@kernel.org>,
Andy Lutomirski <luto@kernel.org>,
Alexandre Chartre <alexandre.chartre@oracle.com>,
Frederic Weisbecker <frederic@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
Petr Mladek <pmladek@suse.com>,
Steven Rostedt <rostedt@goodmis.org>,
Joel Fernandes <joel@joelfernandes.org>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>,
Juergen Gross <jgross@suse.com>, Brian Gerst <brgerst@gmail.com>,
Mathieu Desnoyers <mathieu.desnoyers@efficios.com>,
Josh Poimboeuf <jpoimboe@redhat.com>,
Will Deacon <will@kernel.org>,
Tom Lendacky <thomas.lendacky@amd.com>,
Wei Liu <wei.liu@kernel.org>,
Michael Kelley <mikelley@microsoft.com>,
Jason Chen CJ <jason.cj.chen@intel.com>,
Zhao Yakui <yakui.zhao@intel.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>
Subject: [patch V5 32/38] x86/entry: Remove the apic/BUILD interrupt leftovers
Date: Tue, 12 May 2020 23:01:31 +0200 [thread overview]
Message-ID: <20200512213812.676723624@linutronix.de> (raw)
In-Reply-To: 20200512210059.056244513@linutronix.de
Remove all the code which was there to emit the system vector stubs. All
users are gone.
Move the now unused GET_CR2_INTO macro muck to head_64.S where the last
user is. Fixup the eye hurting comment there while at it.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/entry/calling.h | 20 -----
arch/x86/entry/entry_32.S | 18 ----
arch/x86/entry/entry_64.S | 143 --------------------------------------
arch/x86/include/asm/entry_arch.h | 12 ---
arch/x86/kernel/head_64.S | 7 +
5 files changed, 4 insertions(+), 196 deletions(-)
--- a/arch/x86/entry/calling.h
+++ b/arch/x86/entry/calling.h
@@ -351,23 +351,3 @@ For 32-bit we have the following convent
call stackleak_erase
#endif
.endm
-
-/*
- * This does 'call enter_from_user_mode' unless we can avoid it based on
- * kernel config or using the static jump infrastructure.
- */
-.macro CALL_enter_from_user_mode
-#ifdef CONFIG_CONTEXT_TRACKING
-#ifdef CONFIG_JUMP_LABEL
- STATIC_JUMP_IF_FALSE .Lafter_call_\@, context_tracking_key, def=0
-#endif
- call enter_from_user_mode
-.Lafter_call_\@:
-#endif
-.endm
-
-#ifdef CONFIG_PARAVIRT_XXL
-#define GET_CR2_INTO(reg) GET_CR2_INTO_AX ; _ASM_MOV %_ASM_AX, reg
-#else
-#define GET_CR2_INTO(reg) _ASM_MOV %cr2, reg
-#endif
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -1233,24 +1233,6 @@ SYM_FUNC_END(entry_INT80_32)
#endif
.endm
-#define BUILD_INTERRUPT3(name, nr, fn) \
-SYM_FUNC_START(name) \
- ASM_CLAC; \
- pushl $~(nr); \
- SAVE_ALL switch_stacks=1; \
- ENCODE_FRAME_POINTER; \
- TRACE_IRQS_OFF \
- movl %esp, %eax; \
- call fn; \
- jmp ret_from_intr; \
-SYM_FUNC_END(name)
-
-#define BUILD_INTERRUPT(name, nr) \
- BUILD_INTERRUPT3(name, nr, smp_##name); \
-
-/* The include is where all of the SMP etc. interrupts come from */
-#include <asm/entry_arch.h>
-
#ifdef CONFIG_PARAVIRT
SYM_CODE_START(native_iret)
iret
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -658,108 +658,7 @@ SYM_CODE_END(\asmsym)
*/
#include <asm/idtentry.h>
-/*
- * Interrupt entry helper function.
- *
- * Entry runs with interrupts off. Stack layout at entry:
- * +----------------------------------------------------+
- * | regs->ss |
- * | regs->rsp |
- * | regs->eflags |
- * | regs->cs |
- * | regs->ip |
- * +----------------------------------------------------+
- * | regs->orig_ax = ~(interrupt number) |
- * +----------------------------------------------------+
- * | return address |
- * +----------------------------------------------------+
- */
-SYM_CODE_START(interrupt_entry)
- UNWIND_HINT_IRET_REGS offset=16
- ASM_CLAC
- cld
-
- testb $3, CS-ORIG_RAX+8(%rsp)
- jz 1f
- SWAPGS
- FENCE_SWAPGS_USER_ENTRY
- /*
- * Switch to the thread stack. The IRET frame and orig_ax are
- * on the stack, as well as the return address. RDI..R12 are
- * not (yet) on the stack and space has not (yet) been
- * allocated for them.
- */
- pushq %rdi
-
- /* Need to switch before accessing the thread stack. */
- SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
- movq %rsp, %rdi
- movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
-
- /*
- * We have RDI, return address, and orig_ax on the stack on
- * top of the IRET frame. That means offset=24
- */
- UNWIND_HINT_IRET_REGS base=%rdi offset=24
-
- pushq 7*8(%rdi) /* regs->ss */
- pushq 6*8(%rdi) /* regs->rsp */
- pushq 5*8(%rdi) /* regs->eflags */
- pushq 4*8(%rdi) /* regs->cs */
- pushq 3*8(%rdi) /* regs->ip */
- UNWIND_HINT_IRET_REGS
- pushq 2*8(%rdi) /* regs->orig_ax */
- pushq 8(%rdi) /* return address */
-
- movq (%rdi), %rdi
- jmp 2f
-1:
- FENCE_SWAPGS_KERNEL_ENTRY
-2:
- PUSH_AND_CLEAR_REGS save_ret=1
- ENCODE_FRAME_POINTER 8
-
- testb $3, CS+8(%rsp)
- jz 1f
-
- /*
- * IRQ from user mode.
- *
- * We need to tell lockdep that IRQs are off. We can't do this until
- * we fix gsbase, and we should do it before enter_from_user_mode
- * (which can take locks). Since TRACE_IRQS_OFF is idempotent,
- * the simplest way to handle it is to just call it twice if
- * we enter from user mode. There's no reason to optimize this since
- * TRACE_IRQS_OFF is a no-op if lockdep is off.
- */
- TRACE_IRQS_OFF
-
- CALL_enter_from_user_mode
-
-1:
- ENTER_IRQ_STACK old_rsp=%rdi save_ret=1
- /* We entered an interrupt context - irqs are off: */
- TRACE_IRQS_OFF
-
- ret
-SYM_CODE_END(interrupt_entry)
-_ASM_NOKPROBE(interrupt_entry)
-
SYM_CODE_START_LOCAL(common_interrupt_return)
-ret_from_intr:
- DISABLE_INTERRUPTS(CLBR_ANY)
- TRACE_IRQS_OFF
-
- LEAVE_IRQ_STACK
-
- testb $3, CS(%rsp)
- jz retint_kernel
-
- /* Interrupt came from user space */
-.Lretint_user:
- mov %rsp,%rdi
- call prepare_exit_to_usermode
-
SYM_INNER_LABEL(swapgs_restore_regs_and_return_to_usermode, SYM_L_GLOBAL)
#ifdef CONFIG_DEBUG_ENTRY
/* Assert that pt_regs indicates user mode. */
@@ -802,23 +701,6 @@ SYM_INNER_LABEL(swapgs_restore_regs_and_
INTERRUPT_RETURN
-/* Returning to kernel space */
-retint_kernel:
-#ifdef CONFIG_PREEMPTION
- /* Interrupts are off */
- /* Check if we need preemption */
- btl $9, EFLAGS(%rsp) /* were interrupts off? */
- jnc 1f
- cmpl $0, PER_CPU_VAR(__preempt_count)
- jnz 1f
- call preempt_schedule_irq
-1:
-#endif
- /*
- * The iretq could re-enable interrupts:
- */
- TRACE_IRQS_IRETQ
-
SYM_INNER_LABEL(restore_regs_and_return_to_kernel, SYM_L_GLOBAL)
#ifdef CONFIG_DEBUG_ENTRY
/* Assert that pt_regs indicates kernel mode. */
@@ -932,31 +814,6 @@ SYM_CODE_END(common_interrupt_return)
_ASM_NOKPROBE(common_interrupt_return)
/*
- * APIC interrupts.
- */
-.macro apicinterrupt3 num sym do_sym
-SYM_CODE_START(\sym)
- UNWIND_HINT_IRET_REGS
- pushq $~(\num)
- call interrupt_entry
- UNWIND_HINT_REGS indirect=1
- call \do_sym /* rdi points to pt_regs */
- jmp ret_from_intr
-SYM_CODE_END(\sym)
-_ASM_NOKPROBE(\sym)
-.endm
-
-/* Make sure APIC interrupt handlers end up in the irqentry section: */
-#define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
-#define POP_SECTION_IRQENTRY .popsection
-
-.macro apicinterrupt num sym do_sym
-PUSH_SECTION_IRQENTRY
-apicinterrupt3 \num \sym \do_sym
-POP_SECTION_IRQENTRY
-.endm
-
-/*
* Reload gs selector with exception handling
* edi: new selector
*
--- a/arch/x86/include/asm/entry_arch.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This file is designed to contain the BUILD_INTERRUPT specifications for
- * all of the extra named interrupt vectors used by the architecture.
- * Usually this is the Inter Process Interrupts (IPIs)
- */
-
-/*
- * The following vectors are part of the Linux architecture, there
- * is no hardware IRQ pin equivalent for them, they are triggered
- * through the ICC by us (IPIs)
- */
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -29,15 +29,16 @@
#ifdef CONFIG_PARAVIRT_XXL
#include <asm/asm-offsets.h>
#include <asm/paravirt.h>
+#define GET_CR2_INTO(reg) GET_CR2_INTO_AX ; _ASM_MOV %_ASM_AX, reg
#else
#define INTERRUPT_RETURN iretq
+#define GET_CR2_INTO(reg) _ASM_MOV %cr2, reg
#endif
-/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
+/*
+ * We are not able to switch in one step to the final KERNEL ADDRESS SPACE
* because we need identity-mapped pages.
- *
*/
-
#define l4_index(x) (((x) >> 39) & 511)
#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
next prev parent reply other threads:[~2020-05-12 22:24 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-12 21:00 [patch V5 00/38] x86/entry: Entry/exception code rework - the leftovers Thomas Gleixner
2020-05-12 21:01 ` [patch V5 01/38] x86/kvm/svm: Use uninstrumented wrmsrl() to restore GS Thomas Gleixner
2020-05-13 7:11 ` Jürgen Groß
2020-05-12 21:01 ` [patch V5 02/38] x86/entry/64: Use native swapgs in asm_native_load_gs_index() Thomas Gleixner
2020-05-13 2:02 ` Steven Rostedt
2020-05-13 6:34 ` Thomas Gleixner
2020-05-13 7:12 ` Jürgen Groß
2020-05-19 19:58 ` [tip: x86/entry] x86/entry/64: Use native swapgs in asm_load_gs_index() tip-bot2 for Thomas Gleixner
2020-05-12 21:01 ` [patch V5 03/38] nmi, tracing: Provide nmi_enter/exit_notrace() Thomas Gleixner
2020-05-15 1:32 ` Steven Rostedt
2020-05-15 1:35 ` Steven Rostedt
2020-05-15 1:37 ` Steven Rostedt
2020-05-12 21:01 ` [patch V5 04/38] x86: Make hardware latency tracing explicit Thomas Gleixner
2020-05-15 1:43 ` Steven Rostedt
2020-05-15 15:08 ` Thomas Gleixner
2020-05-12 21:01 ` [patch V5 05/38] genirq: Provide irq_enter/exit_rcu() Thomas Gleixner
2020-05-12 21:01 ` [patch V5 06/38] x86/entry: Provide helpers for execute on irqstack Thomas Gleixner
2020-05-13 21:43 ` Josh Poimboeuf
2020-05-12 21:01 ` [patch V5 07/38] x86/entry/64: Move do_softirq_own_stack() to C Thomas Gleixner
2020-05-12 21:01 ` [patch V5 08/38] x86/entry: Split idtentry_enter/exit() Thomas Gleixner
2020-05-12 21:01 ` [patch V5 09/38] x86/entry: Switch XEN/PV hypercall entry to IDTENTRY Thomas Gleixner
2020-05-14 16:24 ` Boris Ostrovsky
2020-05-12 21:01 ` [patch V5 10/38] x86/entry/64: Simplify idtentry_body Thomas Gleixner
2020-05-12 21:01 ` [patch V5 11/38] rcu: Provide __rcu_is_watching() Thomas Gleixner
2020-05-19 19:52 ` [tip: core/rcu] " tip-bot2 for Thomas Gleixner
2020-05-12 21:01 ` [patch V5 12/38] x86/entry: Provide idtentry_entry/exit_cond_rcu() Thomas Gleixner
2020-05-12 21:01 ` [patch V5 13/38] x86/entry: Switch page fault exception to IDTENTRY_RAW Thomas Gleixner
2020-05-12 21:01 ` [patch V5 14/38] x86/entry: Remove the transition leftovers Thomas Gleixner
2020-05-12 21:01 ` [patch V5 15/38] x86/entry: Change exit path of xen_failsafe_callback Thomas Gleixner
2020-05-12 21:01 ` [patch V5 16/38] x86/entry/64: Remove error_exit Thomas Gleixner
2020-05-12 21:01 ` [patch V5 17/38] x86/entry/32: Remove common_exception Thomas Gleixner
2020-05-12 21:01 ` [patch V5 18/38] x86/irq: Use generic irq_regs implementation Thomas Gleixner
2020-05-12 21:01 ` [patch V5 19/38] x86/irq: Convey vector as argument and not in ptregs Thomas Gleixner
2020-05-12 21:01 ` [patch V5 20/38] x86/irq/64: Provide handle_irq() Thomas Gleixner
2020-05-12 21:01 ` [patch V5 21/38] x86/entry: Add IRQENTRY_IRQ macro Thomas Gleixner
2020-05-12 21:01 ` [patch V5 22/38] x86/entry: Use idtentry for interrupts Thomas Gleixner
2020-05-12 21:01 ` [patch V5 23/38] genirq: Provde __irq_enter/exit_raw() Thomas Gleixner
2020-05-12 21:01 ` [patch V5 24/38] x86/entry: Provide IDTENTRY_SYSVEC Thomas Gleixner
2020-05-15 0:16 ` Boris Ostrovsky
2020-05-15 8:52 ` Thomas Gleixner
2020-05-12 21:01 ` [patch V5 25/38] x86/entry: Convert APIC interrupts to IDTENTRY_SYSVEC Thomas Gleixner
2020-05-12 21:01 ` [patch V5 26/38] x86/entry: Convert SMP system vectors " Thomas Gleixner
2020-05-12 21:01 ` [patch V5 27/38] x86/entry: Convert various system vectors Thomas Gleixner
2020-05-12 21:01 ` [patch V5 28/38] x86/entry: Convert KVM vectors to IDTENTRY_SYSVEC Thomas Gleixner
2020-05-12 21:01 ` [patch V5 29/38] x86/entry: Convert various hypervisor " Thomas Gleixner
2020-05-12 21:01 ` [patch V5 30/38] x86/entry: Convert XEN hypercall vector " Thomas Gleixner
2020-05-12 21:01 ` [patch V5 31/38] x86/entry: Convert reschedule interrupt to IDTENTRY_SYSVEC_SIMPLE Thomas Gleixner
2020-05-12 21:01 ` Thomas Gleixner [this message]
2020-05-12 21:01 ` [patch V5 33/38] x86/entry/64: Remove IRQ stack switching ASM Thomas Gleixner
2020-05-12 21:01 ` [patch V5 34/38] x86/entry: Make enter_from_user_mode() static Thomas Gleixner
2020-05-12 21:01 ` [patch V5 35/38] x86/entry/32: Remove redundant irq disable code Thomas Gleixner
2020-05-12 21:01 ` [patch V5 36/38] x86/entry/64: Remove TRACE_IRQS_*_DEBUG Thomas Gleixner
2020-05-12 21:01 ` [patch V5 37/38] x86/entry: Move paranoid irq tracing out of ASM code Thomas Gleixner
2020-05-12 21:01 ` [patch V5 38/38] x86/entry: Remove the TRACE_IRQS cruft Thomas Gleixner
2020-05-14 16:35 ` [patch V5 00/38] x86/entry: Entry/exception code rework - the leftovers Paul E. McKenney
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