From: Pratyush Yadav <me@yadavpratyush.com>
To: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org, tudor.ambarus@microchip.com,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
anup.patel@wdc.com, aou@eecs.berkeley.edu, palmer@dabbelt.com,
paul.walmsley@sifive.com
Subject: Re: [PATCH v1 2/2] spi: nor: update page program settings for is25wp256 using post bfpt fixup
Date: Fri, 15 May 2020 12:34:36 +0530 [thread overview]
Message-ID: <20200515070436.hk5ho7ygluqznpcq@yadavpratyush.com> (raw)
In-Reply-To: <1589457051-5410-3-git-send-email-sagar.kadam@sifive.com>
Hi Sagar,
On 14/05/20 04:50AM, Sagar Shrikant Kadam wrote:
> During SFDP parsing it is seen that the IS25WP256d device is missing 4BAIT
> (4-Byte address instruction table), due to which it's page program
> capacity doesn't get correctly populated and the device gets configured
> with 4-byte Address Serial Input Page Program i.e. SNOR_PROTO_1_1_1
> even though it can work with SNOR_PROTO_1_1_4.
>
> Here using the post bfpt fixup hooks we update the page program
> settings to 4-byte QUAD Input Page program operations.
>
> The patch is tested on HiFive Unleashed A00 board and it benefits
> few seconds of average write time for entire flash write.
>
> QUAD Input Page Program operations:
> > time mtd_debug write /dev/mtd0 0 33554432 rd32M
> Copied 33554432 bytes from rd32M to address 0x00000000 in flash
> real 0m 32.85s
> user 0m 0.00s
> sys 0m 31.79s
>
> Serial Input Page Program operations:
> > time mtd_debug write /dev/mtd0 0 33554432 rd32M
> Copied 33554432 bytes from rd32M to address 0x00000000 in flash
> real 0m 35.87s
> user 0m 0.00s
> sys 0m 35.42s
>
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
> ---
> drivers/mtd/spi-nor/issi.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
> index ffcb60e..9eb6e82 100644
> --- a/drivers/mtd/spi-nor/issi.c
> +++ b/drivers/mtd/spi-nor/issi.c
> @@ -23,6 +23,22 @@ is25lp256_post_bfpt_fixups(struct spi_nor *nor,
> BFPT_DWORD1_ADDRESS_BYTES_3_ONLY)
> nor->addr_width = 4;
>
> + /*
> + * On IS25WP256d device 4-Byte address instruction table doesn't
> + * get populated and so the device get's configured with 4-byte
> + * Address Serial Input Page Program i.e. SNOR_PROTO_1_1_1 even
> + * though it supports SNOR_PROTO_1_1_4, so priorotize QUAD write
> + * over SINGLE write if device id table holds SPI_NOR_QUAD_READ.
> + */
> + if (strcmp(nor->info->name, "is25wp256") == 0) {
Instead of doing this, wouldn't it make more sense to have a separate
fixup hook for is25wp256? Does this device also need the above address
width fixup? If it does, maybe that can be split into a separate
function, and used by both the fixups?
> + if (nor->info->flags & SPI_NOR_QUAD_READ) {
> + params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
> + spi_nor_set_pp_settings
> + (¶ms->page_programs[SNOR_CMD_PP_1_1_4],
> + SPINOR_OP_PP_1_1_4,
> + SNOR_PROTO_1_1_4);
> + }
> + }
> return 0;
> }
--
Regards,
Pratyush Yadav
next prev parent reply other threads:[~2020-05-15 7:04 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-14 11:50 [PATCH v1 0/2] update is25wp256d page write capabilities Sagar Shrikant Kadam
2020-05-14 11:50 ` [PATCH v1 1/2] riscv: defconfig: enable spi nor on Hifive Unleashed A00 board Sagar Shrikant Kadam
2020-05-14 11:50 ` [PATCH v1 2/2] spi: nor: update page program settings for is25wp256 using post bfpt fixup Sagar Shrikant Kadam
2020-05-15 7:04 ` Pratyush Yadav [this message]
2020-05-15 8:41 ` Sagar Kadam
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