From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Mark Brown <broonie@kernel.org>,
Serge Semin <fancer.lancer@gmail.com>,
Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>,
Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Paul Burton <paulburton@kernel.org>,
Ralf Baechle <ralf@linux-mips.org>,
Rob Herring <robh+dt@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
Allison Randal <allison@lohutok.net>,
Gareth Williams <gareth.williams.jx@renesas.com>,
linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
John Garry <john.garry@huawei.com>,
Chuanhong Guo <gch981213@gmail.com>,
Joe Perches <joe@perches.com>,
Gregory CLEMENT <gregory.clement@bootlin.com>,
Chris Packham <chris.packham@alliedtelesis.co.nz>,
Tomer Maimon <tmaimon77@gmail.com>,
Masahisa Kojima <masahisa.kojima@linaro.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Eddie James <eajames@linux.ibm.com>,
Thomas Gleixner <tglx@linutronix.de>,
Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>,
Jarkko Nikula <jarkko.nikula@linux.intel.com>,
Chuhong Yuan <hslester96@gmail.com>,
Felipe Balbi <felipe.balbi@linux.intel.com>,
Raymond Tan <raymond.tan@intel.com>,
"wuxu.wu" <wuxu.wu@huawei.com>, Clement Leger <cleger@kalray.eu>,
linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 13/19] spi: dw: Move Non-DMA code to the DW PCIe-SPI driver
Date: Fri, 15 May 2020 17:51:53 +0300 [thread overview]
Message-ID: <20200515145153.GJ1634618@smile.fi.intel.com> (raw)
In-Reply-To: <20200515104758.6934-14-Sergey.Semin@baikalelectronics.ru>
On Fri, May 15, 2020 at 01:47:52PM +0300, Serge Semin wrote:
> This is a preparation patch before adding the DW DMA support into the
> DW SPI MMIO driver. We need to unpin the Non-DMA-specific code from the
> intended to be generic DW APB SSI DMA code. This isn't that hard,
> since the most part of the spi-dw-mid.c driver in fact implements a
> generic DMA interface for the DW SPI controller driver. The only Intel
> MID specifics concern getting the max frequency from the MRST Clock
> Control Unit and fetching the DMA controller channels from
> corresponding PCIe DMA controller. Since first one is related with the
> SPI interface configuration we moved it' implementation into the
> DW PCIe-SPI driver module. After that former spi-dw-mid.c file
> can be just renamed to be the DW SPI DMA module optionally compiled in to
> the DW APB SSI core driver.
Cc list here is huge!
I think this patch should go immediately after bunch of fixes.
...
> -obj-$(CONFIG_SPI_DESIGNWARE) += spi-dw.o
> +obj-$(CONFIG_SPI_DESIGNWARE) += spi-dw-core.o
> +spi-dw-core-y := spi-dw.o
> +spi-dw-core-$(CONFIG_SPI_DW_DMA) += spi-dw-dma.o
We may leave module name the same, right?
obj-$(CONFIG_SPI_DESIGNWARE) += spi-dw.o
spi-dw-y := spi-dw-core.o
spi-dw-$(CONFIG_SPI_DW_DMA) += spi-dw-dma.o
> obj-$(CONFIG_SPI_DW_MMIO) += spi-dw-mmio.o
> -obj-$(CONFIG_SPI_DW_PCI) += spi-dw-midpci.o
> -spi-dw-midpci-objs := spi-dw-pci.o spi-dw-mid.o
> +obj-$(CONFIG_SPI_DW_PCI) += spi-dw-pci.o
> -/* Some specific info for SPI0 controller on Intel MID */
> -
> -/* HW info for MRST Clk Control Unit, 32b reg per controller */
> -#define MRST_SPI_CLK_BASE 100000000 /* 100m */
> -#define MRST_CLK_SPI_REG 0xff11d86c
> -#define CLK_SPI_BDIV_OFFSET 0
> -#define CLK_SPI_BDIV_MASK 0x00000007
> -#define CLK_SPI_CDIV_OFFSET 9
> -#define CLK_SPI_CDIV_MASK 0x00000e00
> -#define CLK_SPI_DISABLE_OFFSET 8
> -
> -int dw_spi_mid_init_mfld(struct dw_spi *dws)
> -{
> - void __iomem *clk_reg;
> - u32 clk_cdiv;
> -
> - clk_reg = ioremap(MRST_CLK_SPI_REG, 16);
> - if (!clk_reg)
> - return -ENOMEM;
> -
> - /* Get SPI controller operating freq info */
> - clk_cdiv = readl(clk_reg + dws->bus_num * sizeof(u32));
> - clk_cdiv &= CLK_SPI_CDIV_MASK;
> - clk_cdiv >>= CLK_SPI_CDIV_OFFSET;
> - dws->max_freq = MRST_SPI_CLK_BASE / (clk_cdiv + 1);
> -
> - iounmap(clk_reg);
> -
> - /* Register hook to configure CTRLR0 */
> - dws->update_cr0 = dw_spi_update_cr0;
> -
> - dw_spi_mid_setup_dma_mfld(dws);
> - return 0;
> -}
> -
> -int dw_spi_mid_init_generic(struct dw_spi *dws)
> -{
> - /* Register hook to configure CTRLR0 */
> - dws->update_cr0 = dw_spi_update_cr0;
> -
> - dw_spi_mid_setup_dma_generic(dws);
> - return 0;
> -}
> +EXPORT_SYMBOL_GPL(dw_spi_mid_setup_dma_generic);
> diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c
> index dde54a918b5d..c13707b8493e 100644
> --- a/drivers/spi/spi-dw-pci.c
> +++ b/drivers/spi/spi-dw-pci.c
> @@ -15,6 +15,15 @@
>
> #define DRIVER_NAME "dw_spi_pci"
>
> +/* HW info for MRST Clk Control Unit, 32b reg per controller */
> +#define MRST_SPI_CLK_BASE 100000000 /* 100m */
> +#define MRST_CLK_SPI_REG 0xff11d86c
> +#define CLK_SPI_BDIV_OFFSET 0
> +#define CLK_SPI_BDIV_MASK 0x00000007
> +#define CLK_SPI_CDIV_OFFSET 9
> +#define CLK_SPI_CDIV_MASK 0x00000e00
> +#define CLK_SPI_DISABLE_OFFSET 8
> +
> struct spi_pci_desc {
> int (*setup)(struct dw_spi *);
> u16 num_cs;
> @@ -22,20 +31,55 @@ struct spi_pci_desc {
> u32 max_freq;
> };
>
> +static int spi_mid_init(struct dw_spi *dws)
> +{
> + void __iomem *clk_reg;
> + u32 clk_cdiv;
> +
> + clk_reg = ioremap(MRST_CLK_SPI_REG, 16);
> + if (!clk_reg)
> + return -ENOMEM;
> +
> + /* Get SPI controller operating freq info */
> + clk_cdiv = readl(clk_reg + dws->bus_num * sizeof(u32));
> + clk_cdiv &= CLK_SPI_CDIV_MASK;
> + clk_cdiv >>= CLK_SPI_CDIV_OFFSET;
> + dws->max_freq = MRST_SPI_CLK_BASE / (clk_cdiv + 1);
> +
> + iounmap(clk_reg);
> +
> + /* Register hook to configure CTRLR0 */
> + dws->update_cr0 = dw_spi_update_cr0;
> +
> + dw_spi_mid_setup_dma_mfld(dws);
> +
> + return 0;
> +}
> +
> +static int spi_generic_init(struct dw_spi *dws)
> +{
> + /* Register hook to configure CTRLR0 */
> + dws->update_cr0 = dw_spi_update_cr0;
> +
> + dw_spi_mid_setup_dma_generic(dws);
> +
> + return 0;
> +}
> +
> static struct spi_pci_desc spi_pci_mid_desc_1 = {
> - .setup = dw_spi_mid_init_mfld,
> + .setup = spi_mid_init,
> .num_cs = 5,
> .bus_num = 0,
> };
>
> static struct spi_pci_desc spi_pci_mid_desc_2 = {
> - .setup = dw_spi_mid_init_mfld,
> + .setup = spi_mid_init,
> .num_cs = 2,
> .bus_num = 1,
> };
>
> static struct spi_pci_desc spi_pci_ehl_desc = {
> - .setup = dw_spi_mid_init_generic,
> + .setup = spi_generic_init,
> .num_cs = 2,
> .bus_num = -1,
> .max_freq = 100000000,
> diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
> index d0c8b7d3a5d2..75fdcc5e7642 100644
> --- a/drivers/spi/spi-dw.h
> +++ b/drivers/spi/spi-dw.h
> @@ -265,8 +265,16 @@ extern u32 dw_spi_update_cr0_v1_01a(struct spi_controller *master,
> struct spi_device *spi,
> struct spi_transfer *transfer);
>
> -/* platform related setup */
> -extern int dw_spi_mid_init_mfld(struct dw_spi *dws);
> -extern int dw_spi_mid_init_generic(struct dw_spi *dws);
> +#ifdef CONFIG_SPI_DW_DMA
> +
> +extern void dw_spi_mid_setup_dma_mfld(struct dw_spi *dws);
> +extern void dw_spi_mid_setup_dma_generic(struct dw_spi *dws);
> +
I would drop blank lines and extern keywords.
> +#else
> +
> +static inline void dw_spi_mid_setup_dma_mfld(struct dw_spi *dws) {}
> +static inline void dw_spi_mid_setup_dma_generic(struct dw_spi *dws) {}
> +
Ditto for blank lines.
> +#endif /* !CONFIG_SPI_DW_DMA */
>
> #endif /* DW_SPI_HEADER_H */
> --
> 2.25.1
>
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-05-15 14:52 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-08 13:29 [PATCH 00/17] spi: dw: Add generic DW DMA controller support Serge Semin
2020-05-08 13:29 ` [PATCH 01/17] dt-bindings: spi: Convert DW SPI binding to DT schema Serge Semin
2020-05-08 19:39 ` Andy Shevchenko
2020-05-12 20:28 ` Serge Semin
2020-05-12 20:35 ` Andy Shevchenko
2020-05-08 13:29 ` [PATCH 02/17] dt-bindings: spi: dw: Add DMA properties bindings Serge Semin
2020-05-08 13:29 ` [PATCH 04/17] spi: dw: Cleanup generic DW DMA code namings Serge Semin
2020-05-08 19:43 ` Andy Shevchenko
2020-05-12 21:26 ` Serge Semin
2020-05-12 21:37 ` Andy Shevchenko
2020-05-08 13:29 ` [PATCH 06/17] spi: dw: Add DW SPI DMA/PCI/MMIO dependency on DW SPI core Serge Semin
2020-05-08 13:29 ` [PATCH 08/17] spi: dw: Clear DMAC register when done or stopped Serge Semin
2020-05-08 17:31 ` Mark Brown
2020-05-13 11:56 ` Serge Semin
2020-05-08 13:29 ` [PATCH 09/17] spi: dw: Enable interrupts in accordance with DMA xfer mode Serge Semin
2020-05-08 13:29 ` [PATCH 10/17] spi: dw: Parameterize the DMA Rx/Tx burst length Serge Semin
2020-05-08 13:29 ` [PATCH 12/17] spi: dw: Fix dma_slave_config used partly uninitialized Serge Semin
2020-05-08 19:20 ` Andy Shevchenko
2020-05-08 13:29 ` [PATCH 13/17] spi: dw: Initialize paddr in DW SPI MMIO private data Serge Semin
2020-05-08 19:21 ` Andy Shevchenko
2020-05-13 12:30 ` Serge Semin
2020-05-08 13:33 ` [PATCH 00/17] spi: dw: Add generic DW DMA controller support Mark Brown
2020-05-12 20:07 ` Serge Semin
2020-05-13 10:23 ` Mark Brown
2020-05-13 11:04 ` Serge Semin
2020-05-13 11:21 ` Mark Brown
2020-05-13 11:42 ` Serge Semin
[not found] ` <20200508132943.9826-8-Sergey.Semin@baikalelectronics.ru>
2020-05-08 17:30 ` [PATCH 07/17] spi: dw: Add Tx/Rx finish wait methods to DMA Mark Brown
[not found] ` <20200513113555.mjivjk374giopnea@mobilestation>
2020-05-13 11:36 ` Mark Brown
2020-05-08 17:36 ` [PATCH 00/17] spi: dw: Add generic DW DMA controller support Mark Brown
2020-05-08 19:16 ` Andy Shevchenko
2020-05-12 20:34 ` Serge Semin
2020-05-12 20:30 ` Serge Semin
[not found] ` <20200508132943.9826-15-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:23 ` [PATCH 14/17] spi: dw: Add DMA support to the DW SPI MMIO driver Andy Shevchenko
[not found] ` <20200508132943.9826-17-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:27 ` [PATCH 16/17] spi: dw: Fix Rx-only DMA transfers Andy Shevchenko
[not found] ` <20200508132943.9826-18-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:30 ` [PATCH 17/17] spi: dw: Use regset32 DebugFS method to create a registers file Andy Shevchenko
[not found] ` <20200513124422.z6ctlmvipwer45q4@mobilestation>
2020-05-13 14:41 ` Andy Shevchenko
2020-05-08 19:33 ` [PATCH 00/17] spi: dw: Add generic DW DMA controller support Andy Shevchenko
[not found] ` <20200508132943.9826-12-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:39 ` [PATCH 11/17] spi: dw: Fix native CS being unset Linus Walleij
[not found] ` <20200513001347.dyt357erev7vzy3l@mobilestation>
2020-05-14 8:31 ` Linus Walleij
[not found] ` <20200514115558.e6cqnuxqyqkysfn7@mobilestation>
2020-05-14 12:22 ` Andy Shevchenko
2020-05-14 13:03 ` Mark Brown
2020-05-14 14:35 ` Mark Brown
[not found] ` <20200508132943.9826-4-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:41 ` [PATCH 03/17] spi: dw: Split up the generic DMA code and Intel MID driver Andy Shevchenko
[not found] ` <20200508132943.9826-6-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:44 ` [PATCH 05/17] spi: dw: Discard static DW DMA slave structures Andy Shevchenko
2020-05-15 10:47 ` [PATCH v2 00/19] spi: dw: Add generic DW DMA controller support Serge Semin
2020-05-15 10:47 ` [PATCH v2 01/19] dt-bindings: spi: dw: Add Tx/Rx DMA properties Serge Semin
2020-05-15 11:51 ` Andy Shevchenko
2020-05-15 12:27 ` Mark Brown
2020-05-15 15:43 ` Serge Semin
2020-05-15 10:47 ` [PATCH v2 03/19] spi: dw: Clear DMAC register when done or stopped Serge Semin
2020-05-15 12:01 ` Andy Shevchenko
2020-05-15 16:42 ` Mark Brown
2020-05-15 17:21 ` Serge Semin
2020-05-15 10:47 ` [PATCH v2 05/19] spi: dw: Enable interrupts in accordance with DMA xfer mode Serge Semin
2020-05-15 12:27 ` Andy Shevchenko
2020-05-16 14:06 ` Serge Semin
2020-05-15 10:47 ` [PATCH v2 09/19] spi: dw: Parameterize the DMA Rx/Tx burst length Serge Semin
2020-05-15 14:01 ` Andy Shevchenko
[not found] ` <20200516143353.hw6nny5hbwgiyxfw@mobilestation>
2020-05-18 11:01 ` Andy Shevchenko
2020-05-18 12:41 ` Serge Semin
2020-05-15 10:47 ` [PATCH v2 10/19] spi: dw: Use DMA max burst to set the request thresholds Serge Semin
2020-05-15 14:38 ` Andy Shevchenko
[not found] ` <20200516200133.wmaqnfjbr7234fzo@mobilestation>
2020-05-18 11:03 ` Andy Shevchenko
2020-05-18 12:43 ` Mark Brown
2020-05-18 12:52 ` Serge Semin
2020-05-18 13:25 ` Andy Shevchenko
2020-05-18 13:43 ` Serge Semin
2020-05-18 14:48 ` Andy Shevchenko
2020-05-18 14:59 ` Serge Semin
2020-05-15 10:47 ` [PATCH v2 11/19] spi: dw: Initialize paddr in DW SPI MMIO private data Serge Semin
2020-05-15 14:39 ` Andy Shevchenko
2020-05-15 10:47 ` [PATCH v2 14/19] spi: dw: Remove DW DMA code dependency from DW_DMAC_PCI Serge Semin
2020-05-15 15:02 ` Andy Shevchenko
2020-05-15 10:47 ` [PATCH v2 15/19] spi: dw: Add DW SPI DMA/PCI/MMIO dependency on the DW SPI core Serge Semin
2020-05-15 15:03 ` Andy Shevchenko
2020-05-15 10:47 ` [PATCH v2 17/19] spi: dw: Add DMA support to the DW SPI MMIO driver Serge Semin
2020-05-15 15:08 ` Andy Shevchenko
2020-05-15 10:47 ` [PATCH v2 19/19] dt-bindings: spi: Convert DW SPI binding to DT schema Serge Semin
2020-05-16 20:59 ` Serge Semin
2020-05-15 11:49 ` [PATCH v2 00/19] spi: dw: Add generic DW DMA controller support Andy Shevchenko
2020-05-15 15:30 ` Serge Semin
[not found] ` <20200515104758.6934-3-Sergey.Semin@baikalelectronics.ru>
2020-05-15 12:01 ` [PATCH v2 02/19] spi: dw: Add Tx/Rx finish wait methods to the MID DMA Andy Shevchenko
2020-05-15 12:18 ` Mark Brown
2020-05-15 12:37 ` Andy Shevchenko
2020-05-15 12:41 ` Mark Brown
[not found] ` <20200515200250.zjsv5uaftwqcnwud@mobilestation>
2020-05-18 10:51 ` Mark Brown
[not found] ` <20200518110453.w3ko5a5yzwyr73ir@mobilestation>
2020-05-18 11:11 ` Mark Brown
[not found] ` <20200515194058.pmpd4wa7lw2dle3g@mobilestation>
2020-05-18 10:55 ` Andy Shevchenko
[not found] ` <20200515104758.6934-5-Sergey.Semin@baikalelectronics.ru>
2020-05-15 12:05 ` [PATCH v2 04/19] spi: dw: Fix native CS being unset Andy Shevchenko
[not found] ` <20200515104758.6934-7-Sergey.Semin@baikalelectronics.ru>
2020-05-15 12:34 ` [PATCH v2 06/19] spi: dw: Discard static DW DMA slave structures Andy Shevchenko
[not found] ` <20200516142030.kburieaxjg4n7c42@mobilestation>
2020-05-18 11:00 ` Andy Shevchenko
2020-05-18 11:38 ` Andy Shevchenko
[not found] ` <20200518123242.xoosc4pcj7heo4he@mobilestation>
2020-05-18 13:22 ` Andy Shevchenko
[not found] ` <20200515104758.6934-8-Sergey.Semin@baikalelectronics.ru>
2020-05-15 12:38 ` [PATCH v2 07/19] spi: dw: Discard unused void priv pointer Andy Shevchenko
[not found] ` <20200515104758.6934-9-Sergey.Semin@baikalelectronics.ru>
2020-05-15 13:03 ` [PATCH v2 08/19] spi: dw: Discard dma_width member of the dw_spi structure Andy Shevchenko
[not found] ` <20200515130559.psq2zwfhovt6rzhl@mobilestation>
2020-05-15 13:49 ` Andy Shevchenko
[not found] ` <20200515141627.pqdaic6wksatusl6@mobilestation>
2020-05-15 15:00 ` Andy Shevchenko
[not found] ` <20200515104758.6934-13-Sergey.Semin@baikalelectronics.ru>
2020-05-15 14:40 ` [PATCH v2 12/19] spi: dw: Fix Rx-only DMA transfers Andy Shevchenko
2020-05-15 16:55 ` Mark Brown
[not found] ` <20200515104758.6934-14-Sergey.Semin@baikalelectronics.ru>
2020-05-15 14:51 ` Andy Shevchenko [this message]
[not found] ` <20200516201724.7q5uhxmzpr6xjooj@mobilestation>
[not found] ` <20200518125850.jnhaqlr2ticu3ivs@mobilestation>
2020-05-18 13:00 ` [PATCH v2 13/19] spi: dw: Move Non-DMA code to the DW PCIe-SPI driver Mark Brown
[not found] ` <20200515104758.6934-19-Sergey.Semin@baikalelectronics.ru>
2020-05-15 15:10 ` [PATCH v2 18/19] spi: dw: Use regset32 DebugFS method to create regdump file Andy Shevchenko
[not found] ` <20200516204634.td52orxfnh7iewg6@mobilestation>
2020-05-18 11:18 ` Andy Shevchenko
[not found] ` <20200518140825.jnkfpybxnwq7fx2m@mobilestation>
2020-05-18 15:06 ` Andy Shevchenko
2020-05-15 18:21 ` [PATCH v2 00/19] spi: dw: Add generic DW DMA controller support Mark Brown
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