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From: Xu Yilun <yilun.xu@intel.com>
To: Lee Jones <lee.jones@linaro.org>
Cc: linux-kernel@vger.kernel.org, trix@redhat.com,
	matthew.gerlach@linux.intel.com, russell.h.weight@intel.com,
	lgoncalv@redhat.com, Wu Hao <hao.wu@intel.com>
Subject: Re: [PATCH 1/2] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC
Date: Tue, 14 Jul 2020 14:52:28 +0800	[thread overview]
Message-ID: <20200714065228.GA24900@yilunxu-OptiPlex-7050> (raw)
In-Reply-To: <20200714065043.GF3500@dell>

On Tue, Jul 14, 2020 at 07:50:43AM +0100, Lee Jones wrote:
> On Tue, 14 Jul 2020, Xu Yilun wrote:
> 
> > On Mon, Jul 13, 2020 at 10:17:08AM +0100, Lee Jones wrote:
> > > On Mon, 13 Jul 2020, Xu Yilun wrote:
> > > 
> > > > This patch implements the basic functions of the BMC chip for some Intel
> > > > FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the
> > > > intel max10 CPLD.
> > > > 
> > > > This BMC chip is connected to FPGA by a SPI bus. To provide reliable
> > > > register access from FPGA, an Avalon Memory-Mapped (Avmm) transaction
> > > > protocol over the SPI bus is used between host and slave.
> > > > 
> > > > This driver implements the basic register access with the regmap framework.
> > > > The mfd cells array is empty now as a placeholder.
> > > > 
> > > > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > > > Signed-off-by: Wu Hao <hao.wu@intel.com>
> > > > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> > > > Signed-off-by: Russ Weight <russell.h.weight@intel.com>
> > > > Signed-off-by: Tom Rix <trix@redhat.com>
> > > > ---
> > > >  .../ABI/testing/sysfs-driver-intel-m10-bmc         |  15 +
> > > >  drivers/mfd/Kconfig                                |  13 +
> > > >  drivers/mfd/Makefile                               |   3 +
> > > >  drivers/mfd/intel-m10-bmc-main.c                   | 176 ++++
> > > 
> > > >  drivers/mfd/intel-spi-avmm.c                       | 904 +++++++++++++++++++++
> > > 
> > > This does not belong in MFD.
> > > 
> > > Please consider moving it to drivers/spi.
> > 
> > OK, I could make the intel-spi-avmm.c as a separate module in other
> > folder.
> > 
> > Since it is an implementation of regmap, is it better we move it to
> > drivers/base/regmap?
> 
> Either way, you need to speak to Mark Brown.

Thanks for your suggestion, I'll contact him.

Yilun.

> 
> > > >  drivers/mfd/intel-spi-avmm.h                       |  35 +
> > > >  include/linux/mfd/intel-m10-bmc.h                  |  57 ++
> > > >  7 files changed, 1203 insertions(+)
> > > >  create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc
> > > >  create mode 100644 drivers/mfd/intel-m10-bmc-main.c
> > > >  create mode 100644 drivers/mfd/intel-spi-avmm.c
> > > >  create mode 100644 drivers/mfd/intel-spi-avmm.h
> > > >  create mode 100644 include/linux/mfd/intel-m10-bmc.h
> > > 
> 
> -- 
> Lee Jones [李琼斯]
> Senior Technical Lead - Developer Services
> Linaro.org │ Open source software for Arm SoCs
> Follow Linaro: Facebook | Twitter | Blog

  reply	other threads:[~2020-07-14  6:56 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-13  4:34 [PATCH 0/2] add Intel Max10 BMC chip support Xu Yilun
2020-07-13  4:34 ` [PATCH 1/2] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC Xu Yilun
2020-07-13  9:17   ` Lee Jones
2020-07-14  6:05     ` Xu Yilun
2020-07-14  6:50       ` Lee Jones
2020-07-14  6:52         ` Xu Yilun [this message]
2020-07-13  4:34 ` [PATCH 2/2] mfd: intel-m10-bmc: start with the last SOP on phy rx buffer parsing Xu Yilun

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