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From: Nicolin Chen <nicoleotsuka@gmail.com>
To: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Cc: alsa-devel@alsa-project.org, Timur Tabi <timur@kernel.org>,
	Xiubo Li <Xiubo.Lee@gmail.com>,
	Fabio Estevam <festevam@gmail.com>,
	Shengjiu Wang <shengjiu.wang@gmail.com>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	linux-kernel@vger.kernel.org, kernel@collabora.com
Subject: Re: [PATCH v2 1/2] ASoC: fsl_asrc: make sure the input and output clocks are different
Date: Thu, 16 Jul 2020 16:20:02 -0700	[thread overview]
Message-ID: <20200716232000.GA27246@Asurada-Nvidia> (raw)
In-Reply-To: <20200716151352.193451-2-arnaud.ferraris@collabora.com>

On Thu, Jul 16, 2020 at 05:13:52PM +0200, Arnaud Ferraris wrote:
> The current clock selection algorithm might select the same clock for
> both input and output. This can happen when, for instance, the output
> sample rate is a multiple of the input rate.

What's the issue when selecting the same clock source for both
input and output? Please explain it in the commit logs.

> This patch makes sure it always selects distinct input and output
> clocks.
> 
> Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
> ---
>  sound/soc/fsl/fsl_asrc.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
> index 02c81d2e34ad..6d43cab6c885 100644
> --- a/sound/soc/fsl/fsl_asrc.c
> +++ b/sound/soc/fsl/fsl_asrc.c
> @@ -608,8 +608,8 @@ static void fsl_asrc_select_clk(struct fsl_asrc_priv *asrc_priv,
>  {
>  	struct fsl_asrc_pair_priv *pair_priv = pair->private;
>  	struct asrc_config *config = pair_priv->config;
> -	int rate[2], select_clk[2]; /* Array size 2 means IN and OUT */
> -	int clk_rate, clk_index;
> +	int rate[2], select_clk[2], clk_index[2]; /* Array size 2 means IN and OUT */
> +	int clk_rate;
>  	int i = 0, j = 0;
>  
>  	rate[IN] = in_rate;
> @@ -618,11 +618,12 @@ static void fsl_asrc_select_clk(struct fsl_asrc_priv *asrc_priv,
>  	/* Select proper clock source for internal ratio mode */
>  	for (j = 0; j < 2; j++) {
>  		for (i = 0; i < ASRC_CLK_MAP_LEN; i++) {
> -			clk_index = asrc_priv->clk_map[j][i];
> -			clk_rate = clk_get_rate(asrc_priv->asrck_clk[clk_index]);
> +			clk_index[j] = asrc_priv->clk_map[j][i];
> +			clk_rate = clk_get_rate(asrc_priv->asrck_clk[clk_index[j]]);
>  			/* Only match a perfect clock source with no remainder */

Better to update the comments here as there's a new condition.

>  			if (clk_rate != 0 && (clk_rate / rate[j]) <= 1024 &&
> -			    (clk_rate % rate[j]) == 0)
> +			    (clk_rate % rate[j]) == 0 &&
> +			    (j == 0 || clk_index[j] != clk_index[j-1]))

clk_index[j - 1]

  reply	other threads:[~2020-07-16 23:20 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-16 14:51 [PATCH 0/2] ASoC: fsl_asrc: improve clock selection and quality Arnaud Ferraris
2020-07-16 14:52 ` [PATCH 1/2] ASoC: fsl_asrc: make sure the input and output clocks are different Arnaud Ferraris
2020-07-16 15:07   ` Arnaud Ferraris
2020-07-16 14:52 ` [PATCH 2/2] ASoC: fsl_asrc: always use internal ratio Arnaud Ferraris
2020-07-16 15:13 ` [PATCH v2 0/2] ASoC: fsl_asrc: improve clock selection and quality Arnaud Ferraris
2020-07-16 15:13   ` [PATCH v2 1/2] ASoC: fsl_asrc: make sure the input and output clocks are different Arnaud Ferraris
2020-07-16 23:20     ` Nicolin Chen [this message]
2020-07-17 10:38       ` [PATCH v3 0/1] ASoC: fsl_asrc: always select different clocks Arnaud Ferraris
2020-07-17 10:38         ` [PATCH v3 1/1] ASoC: fsl_asrc: make sure the input and output clocks are different Arnaud Ferraris
2020-07-17 23:05           ` Nicolin Chen
2020-07-20 10:34           ` Shengjiu Wang
2020-07-17 11:21         ` [PATCH v3 0/1] ASoC: fsl_asrc: always select different clocks Mark Brown
2020-07-17 11:34           ` Arnaud Ferraris
2020-07-17 11:45             ` Mark Brown
2020-07-16 15:13   ` [PATCH v2 2/2] ASoC: fsl_asrc: always use internal ratio Arnaud Ferraris
2020-07-16 23:37     ` Nicolin Chen
2020-07-17  9:58       ` Arnaud Ferraris
2020-07-20 10:20         ` Shengjiu Wang

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