From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C2DCC4727D for ; Tue, 29 Sep 2020 13:41:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B85E721531 for ; Tue, 29 Sep 2020 13:41:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="sfSVXlQw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730749AbgI2Nl1 (ORCPT ); Tue, 29 Sep 2020 09:41:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57658 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730635AbgI2NlE (ORCPT ); Tue, 29 Sep 2020 09:41:04 -0400 Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 372B4C0613D1 for ; Tue, 29 Sep 2020 06:41:03 -0700 (PDT) Received: by mail-wr1-x444.google.com with SMTP id j2so5450410wrx.7 for ; Tue, 29 Sep 2020 06:41:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xY18na4GovIke1vjrA11NfaSmLUMEt3XsnVk4ALrIw4=; b=sfSVXlQw2Xbtxvzn+W5Cqa1zXyjXUiOsPHSHklbu/7GeMplfTg2lpbZKdh3UirSQMi p26CrdUEQg+hSJXrJHoYwmGffw9SsfqurxLaneVj1GxivNSgKYdzPVKoLNv+FfUDQPBx ply84cPRq2qPJLZ848gBwavsLvTQdHbFclmSooQdgDDiu2nfxosbzCrH7iqgYXNHo3fH lwAd4+A6T+HGjB3/vKfU2hK72A/zNrSrtFZSsI1DnM8b0vXOlpDbG7TSmENQJaSsxeKK c2ROlKDNsjCce6JAyhesmdf83JEQWlKmCt4ADCEnGpi30k+EVd3YkZl90eIrHnwiC0jH GRfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xY18na4GovIke1vjrA11NfaSmLUMEt3XsnVk4ALrIw4=; b=mu/Sia0Senv0VxgxeVfPcVGs3owu2askTbZDsOiA73aWs4dCdgYxGMzW3TnkQwiYGU woHE0U8GJB2UIup0fFobwQfs+PpVmCRSQUgDz86PfaSRJlm+AfiFbsTcVuik6alwhNGV QeOjvcZWkWP83DMu5TnF0uoeCBPp5VE8Y8YSBjrOtYJtHhTR5KrYRrH9iC+fF0OnCzRe b2CRFbauwzNfRUEg2pHAyX8ssndeRdHYaynPMq3aSyPDLUd7It2VNIjRXLsPOJg5Hvss 0Qnt/KUfk+vPD7vfEnsDWXhuAW7XDyGUagxiSpdSp3DE7rH8b2owpkcMCFiqJiaTmmGx VM2g== X-Gm-Message-State: AOAM533je3mDXLZORhGC/WRM9alumJfQFA5pb3EfzTDJqjvfea1YkfPX 5Eh4C4m5NznCNmfZdq0qFSTB9A== X-Google-Smtp-Source: ABdhPJy1Mi+1OahmsFoBSgcpxvZx0mdiTGrmsrWSuQogI+onmXRkx4sm9M4SOJl9UBancT8oDPLCrQ== X-Received: by 2002:a5d:50c3:: with SMTP id f3mr4346230wrt.125.1601386861856; Tue, 29 Sep 2020 06:41:01 -0700 (PDT) Received: from hackbox2.linaro.org ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id q15sm5955314wrr.8.2020.09.29.06.41.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 06:41:01 -0700 (PDT) From: Leo Yan To: Arnaldo Carvalho de Melo , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Wei Li , James Clark , Andre Przywara , Dave Martin , linux-kernel@vger.kernel.org, Al Grant Cc: Leo Yan Subject: [PATCH v2 12/14] perf arm-spe: Add more sub classes for operation packet Date: Tue, 29 Sep 2020 14:39:15 +0100 Message-Id: <20200929133917.9224-13-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200929133917.9224-1-leo.yan@linaro.org> References: <20200929133917.9224-1-leo.yan@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org For the operation type packet payload with load/store class, it misses to support these sub classes: - A load/store targeting the general-purpose registers; - A load/store targeting unspecified registers; - The ARMv8.4 nested virtualisation extension can redirect system register accesses to a memory page controlled by the hypervisor. The SPE profiling feature in newer implementations can tag those memory accesses accordingly. Add the bit pattern describing load/store sub classes, so that the perf tool can decode it properly. Inspired by Andre Przywara, refined the commit log and code for more clear description. Co-developed-by: Andre Przywara Signed-off-by: Leo Yan --- .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index a848c784f4cf..57a2d5494838 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -378,6 +378,21 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, ret = arm_spe_pkt_snprintf(&buf, &blen, " SIMD-FP"); if (ret < 0) return ret; + } else if ((payload & SPE_OP_PKT_LDST_SUBCLASS_MASK) == + SPE_OP_PKT_LDST_SUBCLASS_GP_REG) { + ret = arm_spe_pkt_snprintf(&buf, &blen, " GP-REG"); + if (ret < 0) + return ret; + } else if ((payload & SPE_OP_PKT_LDST_SUBCLASS_MASK) == + SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG) { + ret = arm_spe_pkt_snprintf(&buf, &blen, " UNSPEC-REG"); + if (ret < 0) + return ret; + } else if ((payload & SPE_OP_PKT_LDST_SUBCLASS_MASK) == + SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG) { + ret = arm_spe_pkt_snprintf(&buf, &blen, " NV-SYSREG"); + if (ret < 0) + return ret; } return buf_len - blen; -- 2.20.1