From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3C4DC04EBE for ; Thu, 8 Oct 2020 14:06:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9D2EE217BA for ; Thu, 8 Oct 2020 14:06:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730455AbgJHOGJ (ORCPT ); Thu, 8 Oct 2020 10:06:09 -0400 Received: from foss.arm.com ([217.140.110.172]:59364 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730432AbgJHOGJ (ORCPT ); Thu, 8 Oct 2020 10:06:09 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7F2481063; Thu, 8 Oct 2020 07:06:08 -0700 (PDT) Received: from bogus (unknown [10.57.53.233]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EA9673F70D; Thu, 8 Oct 2020 07:06:05 -0700 (PDT) Date: Thu, 8 Oct 2020 15:05:58 +0100 From: Sudeep Holla To: "Rafael J. Wysocki" Cc: Ionela Voinescu , Catalin Marinas , Will Deacon , Russell King - ARM Linux , "Rafael J. Wysocki" , Viresh Kumar , Dietmar Eggemann , Valentin Schneider , Sudeep Holla , Linux PM , Linux ARM , Linux Kernel Mailing List Subject: Re: [PATCH 0/2]cpufreq,topology,arm: disable FI for BL_SWITCHER Message-ID: <20201008140558.ovytcc34div3ih6m@bogus> References: <20200924123016.13427-1-ionela.voinescu@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20171215 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Oct 07, 2020 at 04:34:44PM +0200, Rafael J. Wysocki wrote: > On Thu, Sep 24, 2020 at 2:30 PM Ionela Voinescu wrote: > > > > This series is the result of the discussions ([1], [2]) around the > > complications that the BL_SWITCHER poses when it comes to Frequency > > Invariance (FI) and it aims to restart the discussions. > > > > To properly scale its per-entity load-tracking signals, the task > > scheduler needs to be given a frequency scale factor, i.e. some image of > > the current frequency the CPU is running at, relative to its maximum > > frequency. > > > > But (reiterating the message in the changelog of patch 2/2), big.LITTLE > > switching complicates the setting of a correct cpufreq-based frequency > > invariance scale factor due to (as observed in > > drivers/cpufreq/vexpress-spc-cpufreq.c): > > - Incorrect current and maximum frequencies as a result of the > > exposure of a virtual frequency table to the cpufreq core, > > - Missed updates as a result of asynchronous frequency adjustments > > caused by frequency changes in other CPU pairs. > > More information on this feature can be found at [3]. > > > > Given that its functionality is atypical in regards to FI and that this > > is an old technology, patch 2/2 disable FI for when big.LITTLE switching > > is configured in to prevent incorrect scale setting. > > > > For this purpose patch 1/2 changes the way arch_set_freq_scale() is > > defined in architecture code which brings it in line with the logic of > > other architectural function definitions while allowing for less invasive > > filtering of FI support. > > > > In the discussions at [2], three possible solutions were suggested: > > - (1) conditioning FI by !CONFIG_BL_SWITCHER > > - (2) leave as is with note in driver specifying this FI broken > > functionality > > - (3) removing full BL_SWITCHER support > > > > This series restructures the solution at (1). The reason for it is that > > the new patch limits the ifdef filtering to the arm topology include file, > > a location where frequency invariance functions are defined. Therefore, > > this seems more appropriate given that the b.L switcher is an arm > > technology and that the new FI filtering location seems more natural for > > conditioned FI disabling. > > > > Solutions (2) and (3) were not implemented given that there might be some > > remaining users of this technology (Samsung Chromebook 2 - Samsung Exynos > > 5 Octa 5420, Samsung Exynos 5 Octa 5800) and therefore leaving this > > broken (2) seems equally bad to removing support for it (3). > > > > [1] https://lore.kernel.org/lkml/20200701090751.7543-5-ionela.voinescu@arm.com/ > > [2] https://lore.kernel.org/lkml/20200722093732.14297-4-ionela.voinescu@arm.com/ > > [3] https://lwn.net/Articles/481055/ > > I can take this set with the ACKs from Viresh if that's fine by > everyone. Catalin? Sudeep? Acked-by: Sudeep Holla (BL_SWITCHER and topology parts) -- Regards, Sudeep