From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 683F7C63697 for ; Wed, 18 Nov 2020 11:00:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1489722228 for ; Wed, 18 Nov 2020 11:00:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727728AbgKRK7s (ORCPT ); Wed, 18 Nov 2020 05:59:48 -0500 Received: from relay1-d.mail.gandi.net ([217.70.183.193]:6715 "EHLO relay1-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725446AbgKRK7s (ORCPT ); Wed, 18 Nov 2020 05:59:48 -0500 X-Originating-IP: 86.194.74.19 Received: from localhost (lfbn-lyo-1-997-19.w86-194.abo.wanadoo.fr [86.194.74.19]) (Authenticated sender: alexandre.belloni@bootlin.com) by relay1-d.mail.gandi.net (Postfix) with ESMTPSA id 72EBE240010; Wed, 18 Nov 2020 10:59:45 +0000 (UTC) Date: Wed, 18 Nov 2020 11:59:45 +0100 From: Alexandre Belloni To: Gregory CLEMENT Cc: Sebastian Reichel , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, Thomas Petazzoni , Lars Povlsen , Steen.Hegelund@microchip.com Subject: Re: [PATCH 1/5] dt-bindings: reset: ocelot: Add documentation for 'microchip,reset-switch-core' property Message-ID: <20201118105945.GF4556@piout.net> References: <20201116171159.1735315-1-gregory.clement@bootlin.com> <20201116171159.1735315-2-gregory.clement@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201116171159.1735315-2-gregory.clement@bootlin.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16/11/2020 18:11:55+0100, Gregory CLEMENT wrote: > From: Lars Povlsen > > This documents the 'microchip,reset-switch-core' property in the > ocelot-reset driver. > > Signed-off-by: Lars Povlsen > --- > .../devicetree/bindings/power/reset/ocelot-reset.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > index 4d530d815484..20fff03753ad 100644 > --- a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > @@ -9,9 +9,15 @@ microchip Sparx5 armv8 SoC's. > Required Properties: > - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset" > > +Optional properties: > +- microchip,reset-switch-core : Perform a switch core reset at the > + time of driver load. This is may be used to initialize the switch > + core to a known state (before other drivers are loaded). > + If this is to be used by the switchdev driver, then I would simply register this reset as a proper reset controller (with the driver/reset API) and consume that from the switchdev driver. However, the switch may also be configured from userspace in existing products. In this case you'd have to expose a reset interface, either from the drivers/reset core or with a specific consumer. My point is that this property is not necessary. -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com