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From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: tglx@linutronix.de, mingo@kernel.org, bp@suse.de,
	luto@kernel.org, x86@kernel.org
Cc: len.brown@intel.com, dave.hansen@intel.com, jing2.liu@intel.com,
	ravi.v.shankar@intel.com, linux-kernel@vger.kernel.org,
	chang.seok.bae@intel.com
Subject: [PATCH v2 17/22] x86/cpufeatures/amx: Enumerate Advanced Matrix Extension (AMX) feature bits
Date: Thu, 19 Nov 2020 15:32:52 -0800	[thread overview]
Message-ID: <20201119233257.2939-18-chang.seok.bae@intel.com> (raw)
In-Reply-To: <20201119233257.2939-1-chang.seok.bae@intel.com>

Intel's Advanced Matrix Extension (AMX) is a new 64-bit extended feature
consisting of two-dimensional registers and an accelerator unit. The first
implementation of the latter is the tile matrix multiply unit (TMUL). TMUL
performs SIMD dot-products on four bytes (INT8) or two bfloat16
floating-point (BF16) elements.

Here we add AMX to the kernel/user ABI, by enumerating the capability.
E.g., /proc/cpuinfo: amx_tile, amx_bf16, amx_int8

Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
Cc: x86@kernel.org
Cc: linux-kernel@vger.kernel.org
---
 arch/x86/include/asm/cpufeatures.h | 3 +++
 arch/x86/kernel/cpu/cpuid-deps.c   | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 5b6496ee3703..a1839b6a1929 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -375,6 +375,9 @@
 #define X86_FEATURE_TSXLDTRK		(18*32+16) /* TSX Suspend Load Address Tracking */
 #define X86_FEATURE_PCONFIG		(18*32+18) /* Intel PCONFIG */
 #define X86_FEATURE_ARCH_LBR		(18*32+19) /* Intel ARCH LBR */
+#define X86_FEATURE_AMX_BF16		(18*32+22) /* AMX BF16 Support */
+#define X86_FEATURE_AMX_TILE		(18*32+24) /* AMX tile Support */
+#define X86_FEATURE_AMX_INT8		(18*32+25) /* AMX INT8 Support */
 #define X86_FEATURE_SPEC_CTRL		(18*32+26) /* "" Speculation Control (IBRS + IBPB) */
 #define X86_FEATURE_INTEL_STIBP		(18*32+27) /* "" Single Thread Indirect Branch Predictors */
 #define X86_FEATURE_FLUSH_L1D		(18*32+28) /* Flush L1D cache */
diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c
index d502241995a3..aed150626ea0 100644
--- a/arch/x86/kernel/cpu/cpuid-deps.c
+++ b/arch/x86/kernel/cpu/cpuid-deps.c
@@ -71,6 +71,9 @@ static const struct cpuid_dep cpuid_deps[] = {
 	{ X86_FEATURE_AVX512_BF16,		X86_FEATURE_AVX512VL  },
 	{ X86_FEATURE_ENQCMD,			X86_FEATURE_XSAVES    },
 	{ X86_FEATURE_PER_THREAD_MBA,		X86_FEATURE_MBA       },
+	{ X86_FEATURE_AMX_TILE,			X86_FEATURE_XSAVE     },
+	{ X86_FEATURE_AMX_INT8,			X86_FEATURE_AMX_TILE  },
+	{ X86_FEATURE_AMX_BF16,			X86_FEATURE_AMX_TILE  },
 	{}
 };
 
-- 
2.17.1


  parent reply	other threads:[~2020-11-19 23:37 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-19 23:32 [PATCH v2 00/22] x86: Support Intel Advanced Matrix Extensions Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 01/22] x86/fpu/xstate: Modify area init helper prototypes to access all the possible areas Chang S. Bae
2020-12-07 17:12   ` Borislav Petkov
2020-12-07 23:03     ` Bae, Chang Seok
2020-12-07 23:10       ` Borislav Petkov
2020-11-19 23:32 ` [PATCH v2 02/22] x86/fpu/xstate: Modify xstate copy " Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 03/22] x86/fpu/xstate: Modify address finder " Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 04/22] x86/fpu/xstate: Modify save and restore helper " Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 05/22] x86/fpu/xstate: Introduce a new variable for dynamic user states Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 06/22] x86/fpu/xstate: Outline dynamic xstate area size in the task context Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 07/22] x86/fpu/xstate: Introduce helpers to manage an xstate area dynamically Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 08/22] x86/fpu/xstate: Define the scope of the initial xstate data Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 09/22] x86/fpu/xstate: Introduce wrapper functions for organizing xstate area access Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 10/22] x86/fpu/xstate: Update xstate save function for supporting dynamic user xstate Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 11/22] x86/fpu/xstate: Update xstate area address finder " Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 12/22] x86/fpu/xstate: Update xstate context copy function for supporting dynamic area Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 13/22] x86/fpu/xstate: Expand dynamic user state area on first use Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 14/22] x86/fpu/xstate: Inherit dynamic user state when used in the parent Chang S. Bae
2020-11-20  5:08   ` Andy Lutomirski
2020-11-24 18:35     ` Len Brown
2020-11-19 23:32 ` [PATCH v2 15/22] x86/fpu/xstate: Support ptracer-induced xstate area expansion Chang S. Bae
2020-11-20  5:07   ` Andy Lutomirski
2020-11-24 18:22     ` Bae, Chang Seok
2020-11-24 18:33       ` Andy Lutomirski
2020-12-02  4:00         ` Bae, Chang Seok
2020-12-03  5:00           ` Andy Lutomirski
2020-12-08 19:12             ` Bae, Chang Seok
2020-11-19 23:32 ` [PATCH v2 16/22] x86/fpu/xstate: Extend the table for mapping xstate components with features Chang S. Bae
2020-11-19 23:32 ` Chang S. Bae [this message]
2020-11-19 23:32 ` [PATCH v2 18/22] x86/fpu/amx: Define AMX state components and have it used for boot-time checks Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 19/22] x86/fpu/amx: Enable the AMX feature in 64-bit mode Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 20/22] selftest/x86/amx: Include test cases for the AMX state management Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 21/22] x86/fpu/xstate: Support dynamic user state in the signal handling path Chang S. Bae
2020-11-19 23:32 ` [PATCH v2 22/22] x86/fpu/xstate: Introduce boot-parameters for control some state component support Chang S. Bae
2020-11-20  5:02   ` Andy Lutomirski
2020-11-24 18:50     ` Len Brown
2020-11-24 23:41       ` Andy Lutomirski
2020-12-01 18:00         ` Len Brown

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