From: Herbert Xu <herbert@gondor.apana.org.au>
To: Yang Shen <shenyang39@huawei.com>
Cc: davem@davemloft.net, linux-kernel@vger.kernel.org,
linux-crypto@vger.kernel.org, xuzaibo@huawei.com,
wangzhou1@hisilicon.com
Subject: Re: [PATCH] crypto: hisilicon/zip - add a work_queue for zip irq
Date: Fri, 20 Nov 2020 17:57:59 +1100 [thread overview]
Message-ID: <20201120065759.GE20581@gondor.apana.org.au> (raw)
In-Reply-To: <1605259955-17796-1-git-send-email-shenyang39@huawei.com>
On Fri, Nov 13, 2020 at 05:32:35PM +0800, Yang Shen wrote:
> The patch 'irqchip/gic-v3-its: Balance initial LPI affinity across CPUs'
> set the IRQ to an uncentain CPU. If an IRQ is bound to the CPU used by the
> thread which is sending request, the throughput will be just half.
>
> So allocate a 'work_queue' and set as 'WQ_UNBOUND' to do the back half work
> on some different CPUS.
>
> Signed-off-by: Yang Shen <shenyang39@huawei.com>
> Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
> ---
> drivers/crypto/hisilicon/zip/zip_main.c | 26 +++++++++++++++++++++++---
> 1 file changed, 23 insertions(+), 3 deletions(-)
Patch applied. Thanks.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
prev parent reply other threads:[~2020-11-20 6:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-13 9:32 [PATCH] crypto: hisilicon/zip - add a work_queue for zip irq Yang Shen
2020-11-19 8:49 ` Zhou Wang
2020-11-20 6:57 ` Herbert Xu [this message]
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