From: mgross@linux.intel.com
To: linux-kernel@vger.kernel.org
Cc: markgross@kernel.org, mgross@linux.intel.com,
adam.r.gretzinger@intel.com,
Srikanth Thokala <srikanth.thokala@intel.com>,
Jonathan Corbet <corbet@lwn.net>,
linux-doc@vger.kernel.org
Subject: [PATCH 06/22] misc: xlink-pcie: Add documentation for XLink PCIe driver
Date: Mon, 30 Nov 2020 15:06:51 -0800 [thread overview]
Message-ID: <20201130230707.46351-7-mgross@linux.intel.com> (raw)
In-Reply-To: <20201130230707.46351-1-mgross@linux.intel.com>
From: Srikanth Thokala <srikanth.thokala@intel.com>
Provide overview of XLink PCIe driver implementation
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: linux-doc@vger.kernel.org
Reviewed-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Srikanth Thokala <srikanth.thokala@intel.com>
---
Documentation/vpu/index.rst | 1 +
Documentation/vpu/xlink-pcie.rst | 91 ++++++++++++++++++++++++++++++++
2 files changed, 92 insertions(+)
create mode 100644 Documentation/vpu/xlink-pcie.rst
diff --git a/Documentation/vpu/index.rst b/Documentation/vpu/index.rst
index 7e290e048910..661cc700ee45 100644
--- a/Documentation/vpu/index.rst
+++ b/Documentation/vpu/index.rst
@@ -14,3 +14,4 @@ This documentation contains information for the Intel VPU stack.
:maxdepth: 2
vpu-stack-overview
+ xlink-pcie
diff --git a/Documentation/vpu/xlink-pcie.rst b/Documentation/vpu/xlink-pcie.rst
new file mode 100644
index 000000000000..bc64b566989d
--- /dev/null
+++ b/Documentation/vpu/xlink-pcie.rst
@@ -0,0 +1,91 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+Kernel driver: xlink-pcie driver
+================================
+Supported chips:
+ * Intel Edge.AI Computer Vision platforms: Keem Bay
+ Suffix: Bay
+ Slave address: 6240
+ Datasheet: Publicly available at Intel
+
+Author: Srikanth Thokala Srikanth.Thokala@intel.com
+
+-------------
+Introduction:
+-------------
+The xlink-pcie driver in linux-5.4 provides transport layer implementation for
+the data transfers to support xlink protocol subsystem communication with the
+peer device. i.e, between remote host system and the local Keem Bay device.
+
+The Keem Bay device is an ARM based SOC that includes a vision processing
+unit (VPU) and deep learning, neural network core in the hardware.
+The xlink-pcie driver exports a functional device endpoint to the Keem Bay device
+and supports two-way communication with peer device.
+
+------------------------
+High-level architecture:
+------------------------
+Remote Host: IA CPU
+Local Host: ARM CPU (Keem Bay)::
+
+ +------------------------------------------------------------------------+
+ | Remote Host IA CPU | | Local Host ARM CPU (Keem Bay) | |
+ +==================================+=+===============================+===+
+ | User App | | User App | |
+ +----------------------------------+-+-------------------------------+---+
+ | XLink UAPI | | XLink UAPI | |
+ +----------------------------------+-+-------------------------------+---+
+ | XLink Core | | XLink Core | |
+ +----------------------------------+-+-------------------------------+---+
+ | XLink PCIe | | XLink PCIe | |
+ +----------------------------------+-+-------------------------------+---+
+ | XLink-PCIe Remote Host driver | | XLink-PCIe Local Host driver | |
+ +----------------------------------+-+-------------------------------+---+
+ |-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:|:|:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:|
+ +----------------------------------+-+-------------------------------+---+
+ | PCIe Host Controller | | PCIe Device Controller | HW|
+ +----------------------------------+-+-------------------------------+---+
+ ^ ^
+ | |
+ |------------- PCIe x2 Link -----------------|
+
+This XLink PCIe driver comprises of two variants:
+* Local Host driver
+
+ * Intended for ARM CPU
+ * It is based on PCI Endpoint Framework
+ * Driver path: {tree}/drivers/misc/xlink-pcie/local_host
+
+* Remote Host driver
+
+ * Intended for IA CPU
+ * It is a PCIe endpoint driver
+ * Driver path: {tree}/drivers/misc/xlink-pcie/remote_host
+
+XLink PCIe communication between local host and remote host is achieved through
+ring buffer management and MSI/Doorbell interrupts.
+
+The xlink-pcie driver subsystem registers Keem Bay device as an endpoint driver
+and provides standard linux pcie sysfs interface, # /sys/bus/pci/devices/xxxx:xx:xx.0/
+
+
+-------------------------
+XLink protocol subsystem:
+-------------------------
+xlink is an abstracted control and communication subsystem based on channel
+identification. It is intended to support VPU technology both at SoC level as
+well as at IP level, over multiple interfaces.
+
+- The xlink subsystem abstracts several types of communication channels
+ underneath, allowing the usage of different interfaces with the
+ same function call interface.
+- The Communication channels are full-duplex protocol channels allowing
+ concurrent bidirectional communication.
+- The xlink subsystem also supports control operations to VPU either
+ from standalone local system or from remote system based on communication
+ interface underneath.
+- The xlink subsystem supports following communication interfaces:
+ * USB CDC
+ * Gigabit Ethernet
+ * PCIe
+ * IPC
--
2.17.1
next prev parent reply other threads:[~2020-11-30 23:08 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-30 23:06 [PATCH 00/22] Intel Vision Processing Unit base enabling part 1 mgross
2020-11-30 23:06 ` [PATCH 01/22] Add Vision Processing Unit (VPU) documentation mgross
2020-11-30 23:06 ` [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver mgross
2020-11-30 23:06 ` [PATCH 03/22] keembay-ipc: Add Keem Bay IPC module mgross
2020-11-30 23:06 ` [PATCH 04/22] dt-bindings: Add bindings for Keem Bay VPU IPC driver mgross
2020-11-30 23:06 ` [PATCH 05/22] keembay-vpu-ipc: Add Keem Bay VPU IPC module mgross
2020-11-30 23:06 ` mgross [this message]
2020-11-30 23:06 ` [PATCH 07/22] misc: xlink-pcie: lh: Add PCIe EPF driver for Local Host mgross
2020-12-01 10:13 ` Greg Kroah-Hartman
2020-12-01 17:45 ` mark gross
2020-12-01 17:54 ` Greg Kroah-Hartman
2020-12-01 22:00 ` mark gross
2020-12-01 18:29 ` Dragan Cvetic
2020-12-01 10:17 ` Greg Kroah-Hartman
2020-12-02 16:48 ` Thokala, Srikanth
2020-11-30 23:06 ` [PATCH 08/22] misc: xlink-pcie: lh: Add PCIe EP DMA functionality mgross
2020-11-30 23:06 ` [PATCH 09/22] misc: xlink-pcie: lh: Add core communication logic mgross
2020-12-01 10:15 ` Greg Kroah-Hartman
2020-11-30 23:06 ` [PATCH 10/22] misc: xlink-pcie: lh: Prepare changes for adding remote host driver mgross
2020-11-30 23:06 ` [PATCH 11/22] misc: xlink-pcie: rh: Add PCIe EP driver for Remote Host mgross
2020-11-30 23:06 ` [PATCH 12/22] misc: xlink-pcie: rh: Add core communication logic mgross
2020-11-30 23:06 ` [PATCH 13/22] misc: xlink-pcie: Add XLink API interface mgross
2020-11-30 23:06 ` [PATCH 14/22] misc: xlink-pcie: Add asynchronous event notification support for XLink mgross
2020-11-30 23:07 ` [PATCH 15/22] xlink-ipc: Add xlink ipc device tree bindings mgross
2020-11-30 23:07 ` [PATCH 16/22] xlink-ipc: Add xlink ipc driver mgross
2020-11-30 23:07 ` [PATCH 17/22] xlink-core: Add xlink core device tree bindings mgross
2020-11-30 23:07 ` [PATCH 18/22] xlink-core: Add xlink core driver xLink mgross
2020-11-30 23:07 ` [PATCH 19/22] xlink-core: Enable xlink protocol over pcie mgross
2020-11-30 23:07 ` [PATCH 20/22] xlink-core: Enable VPU IP management and runtime control mgross
2020-11-30 23:07 ` [PATCH 21/22] xlink-core: add async channel and events mgross
2020-11-30 23:07 ` [PATCH 22/22] xlink-core: factorize xlink_ioctl function by creating sub-functions for each ioctl command mgross
2020-12-01 10:14 ` [PATCH 00/22] Intel Vision Processing Unit base enabling part 1 Greg KH
2020-12-01 17:53 ` mark gross
2020-12-01 22:34 mgross
2020-12-01 22:34 ` [PATCH 06/22] misc: xlink-pcie: Add documentation for XLink PCIe driver mgross
2020-12-18 22:59 ` Randy Dunlap
2020-12-19 0:07 ` mark gross
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