From: Zhen Lei <thunder.leizhen@huawei.com>
To: Russell King <rmk+kernel@arm.linux.org.uk>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Will Deacon <will.deacon@arm.com>,
"Haojian Zhuang" <haojian.zhuang@gmail.com>,
Arnd Bergmann <arnd@arndb.de>, Rob Herring <robh+dt@kernel.org>,
Wei Xu <xuwei5@hisilicon.com>,
devicetree <devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Cc: Zhen Lei <thunder.leizhen@huawei.com>
Subject: [PATCH v4 2/3] dt-bindings: arm: hisilicon: Add binding for Kunpeng L3 cache controller
Date: Wed, 13 Jan 2021 17:39:41 +0800 [thread overview]
Message-ID: <20210113093942.809-3-thunder.leizhen@huawei.com> (raw)
In-Reply-To: <20210113093942.809-1-thunder.leizhen@huawei.com>
Add devicetree binding for Hisilicon Kunpeng L3 cache controller.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../arm/hisilicon/kunpeng-l3cache.yaml | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/kunpeng-l3cache.yaml
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/kunpeng-l3cache.yaml b/Documentation/devicetree/bindings/arm/hisilicon/kunpeng-l3cache.yaml
new file mode 100644
index 000000000000000..c6aa502bf08fbee
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/kunpeng-l3cache.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/kunpeng-l3cache.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon Kunpeng L3 cache controller
+
+maintainers:
+ - Wei Xu <xuwei5@hisilicon.com>
+
+description: |
+ The Hisilicon Kunpeng L3 outer cache controller supports a maximum of 36-bit
+ physical addresses. The data cached in the L3 outer cache can be operated
+ based on the physical address range or the entire cache.
+
+properties:
+ compatible:
+ items:
+ - const: hisilicon,kunpeng-l3cache
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ l3cache@f302b000 {
+ compatible = "hisilicon,kunpeng-l3cache";
+ reg = <0xf302b000 0x1000>;
+ };
+...
--
2.26.0.106.g9fadedd
next prev parent reply other threads:[~2021-01-13 9:41 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-13 9:39 [PATCH v4 0/3] ARM: Add support for Hisilicon Kunpeng L3 cache controller Zhen Lei
2021-01-13 9:39 ` [PATCH v4 1/3] ARM: LPAE: Use phys_addr_t instead of unsigned long in outercache hooks Zhen Lei
2021-01-13 9:39 ` Zhen Lei [this message]
2021-01-13 9:39 ` [PATCH v4 3/3] ARM: Add support for Hisilicon Kunpeng L3 cache controller Zhen Lei
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