From: Paul Cercueil <paul@crapouillou.net>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Zhou Yanjie <zhouyanjie@wanyeetech.com>
Cc: od@zcrc.me, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mips@vger.kernel.org, Paul Cercueil <paul@crapouillou.net>
Subject: [PATCH 0/6] clk: Ingenic JZ4760(B) support
Date: Sun, 7 Mar 2021 14:17:53 +0000 [thread overview]
Message-ID: <20210307141759.30426-1-paul@crapouillou.net> (raw)
Hi,
Here are a set of patches to add support for the Ingenic JZ4760(B) SoCs.
One thing to note is that the ingenic,jz4760-tcu is undocumented for now,
as I will update the TCU documentation in a different patchset.
Zhou: the CGU code now supports overriding the PLL M/N/OD calc
algorithm, please tell me if it works for you.
Cheers,
-Paul
Paul Cercueil (6):
dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles
clk: Support bypassing dividers
clk: ingenic: Read bypass register only when there is one
clk: ingenic: Remove pll_info.no_bypass_bit
clk: ingenic: Support overriding PLLs M/N/OD calc algorithm
clk: ingenic: Add support for the JZ4760
.../bindings/clock/ingenic,cgu.yaml | 4 +
drivers/clk/ingenic/Kconfig | 10 +
drivers/clk/ingenic/Makefile | 1 +
drivers/clk/ingenic/cgu.c | 92 ++--
drivers/clk/ingenic/cgu.h | 12 +-
drivers/clk/ingenic/jz4725b-cgu.c | 12 +-
drivers/clk/ingenic/jz4740-cgu.c | 12 +-
drivers/clk/ingenic/jz4760-cgu.c | 433 ++++++++++++++++++
drivers/clk/ingenic/jz4770-cgu.c | 15 +-
drivers/clk/ingenic/tcu.c | 2 +
include/dt-bindings/clock/jz4760-cgu.h | 54 +++
11 files changed, 591 insertions(+), 56 deletions(-)
create mode 100644 drivers/clk/ingenic/jz4760-cgu.c
create mode 100644 include/dt-bindings/clock/jz4760-cgu.h
--
2.30.1
next reply other threads:[~2021-03-07 14:18 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-07 14:17 Paul Cercueil [this message]
2021-03-07 14:17 ` [PATCH 1/6] dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles Paul Cercueil
2021-03-08 22:56 ` Rob Herring
2021-03-07 14:17 ` [PATCH 2/6] clk: Support bypassing dividers Paul Cercueil
2021-03-07 14:17 ` [PATCH 3/6] clk: ingenic: Read bypass register only when there is one Paul Cercueil
2021-03-07 14:17 ` [PATCH 4/6] clk: ingenic: Remove pll_info.no_bypass_bit Paul Cercueil
2021-03-07 14:17 ` [PATCH 5/6] clk: ingenic: Support overriding PLLs M/N/OD calc algorithm Paul Cercueil
2021-03-10 14:42 ` Zhou Yanjie
2021-03-07 14:17 ` [PATCH 6/6] clk: ingenic: Add support for the JZ4760 Paul Cercueil
2021-03-17 12:41 ` Zhou Yanjie
2021-03-22 17:40 ` Paul Cercueil
2021-03-23 15:41 ` Zhou Yanjie
2021-03-23 15:55 ` Paul Cercueil
2021-03-09 6:31 ` [PATCH 0/6] clk: Ingenic JZ4760(B) support Zhou Yanjie
2021-03-09 15:33 ` Zhou Yanjie
2021-03-10 14:40 ` Zhou Yanjie
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