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From: Ira Weiny <ira.weiny@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>
Cc: Dan Williams <dan.j.williams@intel.com>,
	Fenghua Yu <fenghua.yu@intel.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org
Subject: Re: [PATCH V4 07/10] x86/pks: Preserve the PKRS MSR on context switch
Date: Tue, 30 Mar 2021 12:25:58 -0700	[thread overview]
Message-ID: <20210330192558.GD3014244@iweiny-DESK2.sc.intel.com> (raw)
In-Reply-To: <20210322053020.2287058-8-ira.weiny@intel.com>

[snip]

<self review>

The test bot reported build errors on i386 yesterday.  Not sure why they were
not caught before...

Anyway that caused me to look at this patch again and I've found a couple of
issues noted below.  Combined with Sean's review I'll be re-spinning a new v5.

> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index 546d6ecf0a35..c15a049bf6ac 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -765,6 +765,7 @@
>  
>  #define MSR_IA32_TSC_DEADLINE		0x000006E0
>  
> +#define MSR_IA32_PKRS			0x000006E1

This belongs in patch 5 where it is 'used'.  Note that nothing is really used
until the final test patch...  But in review this define does not make any
sense here...

>  
>  #define MSR_TSX_FORCE_ABORT		0x0000010F
>  
> diff --git a/arch/x86/include/asm/pkeys_common.h b/arch/x86/include/asm/pkeys_common.h
> index 0681522974ba..6917f1a27479 100644
> --- a/arch/x86/include/asm/pkeys_common.h
> +++ b/arch/x86/include/asm/pkeys_common.h
> @@ -17,4 +17,18 @@
>  #define PKR_AD_KEY(pkey)     (PKR_AD_BIT << PKR_PKEY_SHIFT(pkey))
>  #define PKR_WD_KEY(pkey)     (PKR_WD_BIT << PKR_PKEY_SHIFT(pkey))
>  
> +/*
> + * Define a default PKRS value for each task.
> + *
> + * Key 0 has no restriction.  All other keys are set to the most restrictive
> + * value which is access disabled (AD=1).
> + *
> + * NOTE: This needs to be a macro to be used as part of the INIT_THREAD macro.
> + */
> +#define INIT_PKRS_VALUE (PKR_AD_KEY(1) | PKR_AD_KEY(2) | PKR_AD_KEY(3) | \
> +			 PKR_AD_KEY(4) | PKR_AD_KEY(5) | PKR_AD_KEY(6) | \
> +			 PKR_AD_KEY(7) | PKR_AD_KEY(8) | PKR_AD_KEY(9) | \
> +			 PKR_AD_KEY(10) | PKR_AD_KEY(11) | PKR_AD_KEY(12) | \
> +			 PKR_AD_KEY(13) | PKR_AD_KEY(14) | PKR_AD_KEY(15))

The same is true for this macro.  While it is used in this patch it is used
first in patch 5.  So it should be there.

I'm letting 0-day crank on these changes but there should be a v5 out very
soon.

Sorry for the noise,
Ira


  reply	other threads:[~2021-03-30 19:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-22  5:30 [PATCH V4 00/10] PKS Add Protection Key Supervisor support ira.weiny
2021-03-22  5:30 ` [PATCH V4 01/10] x86/pkeys: Create pkeys_common.h ira.weiny
2021-03-22  5:30 ` [PATCH V4 02/10] x86/fpu: Refactor arch_set_user_pkey_access() for PKS support ira.weiny
2021-03-22  5:30 ` [PATCH V4 03/10] x86/pks: Add additional PKEY helper macros ira.weiny
2021-03-22  5:30 ` [PATCH V4 04/10] x86/pks: Add PKS defines and Kconfig options ira.weiny
2021-03-22  5:30 ` [PATCH V4 05/10] x86/pks: Add PKS setup code ira.weiny
2021-03-22  5:30 ` [PATCH V4 06/10] x86/fault: Adjust WARN_ON for PKey fault ira.weiny
2021-03-22 16:05   ` Sean Christopherson
2021-03-22 22:44     ` Ira Weiny
2021-03-24 19:50   ` [PATCH V4.1] " ira.weiny
2021-03-22  5:30 ` [PATCH V4 07/10] x86/pks: Preserve the PKRS MSR on context switch ira.weiny
2021-03-30 19:25   ` Ira Weiny [this message]
2021-03-22  5:30 ` [PATCH V4 08/10] x86/entry: Preserve PKRS MSR across exceptions ira.weiny
2021-03-22  5:30 ` [PATCH V4 09/10] x86/pks: Add PKS kernel API ira.weiny
2021-03-24 19:53   ` [PATCH V4.1] " ira.weiny
2021-03-22  5:30 ` [PATCH V4 10/10] x86/pks: Add PKS test code ira.weiny

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