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From: kernel test robot <lkp@intel.com>
To: Yicong Yang <yangyicong@hisilicon.com>,
	alexander.shishkin@linux.intel.com, helgaas@kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Cc: kbuild-all@lists.01.org, lorenzo.pieralisi@arm.com,
	gregkh@linuxfoundation.org, jonathan.cameron@huawei.com,
	song.bao.hua@hisilicon.com, prime.zeng@huawei.com,
	yangyicong@hisilicon.com
Subject: Re: [PATCH 1/4] hwtracing: Add trace function support for HiSilicon PCIe Tune and Trace device
Date: Wed, 7 Apr 2021 06:48:40 +0800	[thread overview]
Message-ID: <202104070654.MoBqdv9k-lkp@intel.com> (raw)
In-Reply-To: <1617713154-35533-2-git-send-email-yangyicong@hisilicon.com>

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Hi Yicong,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.12-rc6 next-20210406]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Yicong-Yang/Add-support-for-HiSilicon-PCIe-Tune-and-Trace-device/20210406-204959
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 0a50438c84363bd37fe18fe432888ae9a074dcab
config: nios2-allyesconfig (attached as .config)
compiler: nios2-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/8d755179573b25c8c165509321a32c3c04b10ab5
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Yicong-Yang/Add-support-for-HiSilicon-PCIe-Tune-and-Trace-device/20210406-204959
        git checkout 8d755179573b25c8c165509321a32c3c04b10ab5
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=nios2 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/hwtracing/hisilicon/hisi_ptt.c: In function 'hisi_ptt_irq_register':
>> drivers/hwtracing/hisilicon/hisi_ptt.c:1067:3: error: implicit declaration of function 'pci_free_irq_vectors'; did you mean 'pci_alloc_irq_vectors'? [-Werror=implicit-function-declaration]
    1067 |   pci_free_irq_vectors(pdev);
         |   ^~~~~~~~~~~~~~~~~~~~
         |   pci_alloc_irq_vectors
   drivers/hwtracing/hisilicon/hisi_ptt.c: In function 'hisi_ptt_init_ctrls':
>> drivers/hwtracing/hisilicon/hisi_ptt.c:1231:8: error: implicit declaration of function 'pci_find_bus'; did you mean 'pci_find_next_bus'? [-Werror=implicit-function-declaration]
    1231 |  bus = pci_find_bus(pci_domain_nr(hisi_ptt->pdev->bus),
         |        ^~~~~~~~~~~~
         |        pci_find_next_bus
   drivers/hwtracing/hisilicon/hisi_ptt.c:1231:6: warning: assignment to 'struct pci_bus *' from 'int' makes pointer from integer without a cast [-Wint-conversion]
    1231 |  bus = pci_find_bus(pci_domain_nr(hisi_ptt->pdev->bus),
         |      ^
>> drivers/hwtracing/hisilicon/hisi_ptt.c:1234:3: error: implicit declaration of function 'pci_walk_bus' [-Werror=implicit-function-declaration]
    1234 |   pci_walk_bus(bus, hisi_ptt_init_filters, hisi_ptt);
         |   ^~~~~~~~~~~~
   drivers/hwtracing/hisilicon/hisi_ptt.c: In function 'hisi_ptt_probe':
>> drivers/hwtracing/hisilicon/hisi_ptt.c:1359:31: error: 'pci_bus_type' undeclared (first use in this function); did you mean 'pci_pcie_type'?
    1359 |  ret = bus_register_notifier(&pci_bus_type, &hisi_ptt->hisi_ptt_nb);
         |                               ^~~~~~~~~~~~
         |                               pci_pcie_type
   drivers/hwtracing/hisilicon/hisi_ptt.c:1359:31: note: each undeclared identifier is reported only once for each function it appears in
   drivers/hwtracing/hisilicon/hisi_ptt.c: At top level:
   drivers/hwtracing/hisilicon/hisi_ptt.c:1366:6: warning: no previous prototype for 'hisi_ptt_remove' [-Wmissing-prototypes]
    1366 | void hisi_ptt_remove(struct pci_dev *pdev)
         |      ^~~~~~~~~~~~~~~
   drivers/hwtracing/hisilicon/hisi_ptt.c: In function 'hisi_ptt_remove':
   drivers/hwtracing/hisilicon/hisi_ptt.c:1370:27: error: 'pci_bus_type' undeclared (first use in this function); did you mean 'pci_pcie_type'?
    1370 |  bus_unregister_notifier(&pci_bus_type, &hisi_ptt->hisi_ptt_nb);
         |                           ^~~~~~~~~~~~
         |                           pci_pcie_type
   cc1: some warnings being treated as errors


vim +1067 drivers/hwtracing/hisilicon/hisi_ptt.c

  1048	
  1049	static int hisi_ptt_irq_register(struct hisi_ptt *hisi_ptt)
  1050	{
  1051		struct pci_dev *pdev = hisi_ptt->pdev;
  1052		int ret;
  1053	
  1054		ret = pci_alloc_irq_vectors(pdev, HISI_PTT_IRQ_NUMS, HISI_PTT_IRQ_NUMS,
  1055					    PCI_IRQ_MSI);
  1056		if (ret < 0) {
  1057			pci_err(pdev, "failed to allocate irq vector, ret = %d\n", ret);
  1058			return ret;
  1059		}
  1060	
  1061		ret = request_threaded_irq(pci_irq_vector(pdev, HISI_PTT_DMA_IRQ),
  1062					   hisi_ptt_irq, hisi_ptt_isr, IRQF_SHARED,
  1063					   "hisi-ptt", hisi_ptt);
  1064		if (ret) {
  1065			pci_err(pdev, "failed to request irq %d, ret = %d\n",
  1066				pci_irq_vector(pdev, HISI_PTT_DMA_IRQ), ret);
> 1067			pci_free_irq_vectors(pdev);
  1068			return ret;
  1069		}
  1070	
  1071		return 0;
  1072	}
  1073	
  1074	static void hisi_ptt_irq_unregister(struct hisi_ptt *hisi_ptt)
  1075	{
  1076		struct pci_dev *pdev = hisi_ptt->pdev;
  1077	
  1078		free_irq(pci_irq_vector(pdev, HISI_PTT_DMA_IRQ), hisi_ptt);
  1079		pci_free_irq_vectors(pdev);
  1080	}
  1081	
  1082	static void hisi_ptt_update_filters(struct work_struct *work)
  1083	{
  1084		struct delayed_work *delayed_work = to_delayed_work(work);
  1085		struct hisi_ptt_filter_update_info info;
  1086		struct hisi_ptt_filter_desc *filter;
  1087		struct list_head *target_list;
  1088		struct hisi_ptt *hisi_ptt;
  1089	
  1090		hisi_ptt = container_of(delayed_work, struct hisi_ptt, work);
  1091	
  1092		if (!mutex_trylock(&hisi_ptt->mutex)) {
  1093			schedule_delayed_work(&hisi_ptt->work, HISI_PTT_WORK_DELAY_MS);
  1094			return;
  1095		}
  1096	
  1097		while (kfifo_get(&hisi_ptt->filter_update_kfifo, &info)) {
  1098			target_list = info.is_port ? &hisi_ptt->port_filters :
  1099				      &hisi_ptt->req_filters;
  1100	
  1101			if (info.is_add) {
  1102				filter = kzalloc(sizeof(*filter), GFP_KERNEL);
  1103				if (!filter) {
  1104					pci_err(hisi_ptt->pdev,
  1105						"failed to update the filters\n");
  1106					continue;
  1107				}
  1108	
  1109				filter->pdev = info.pdev;
  1110				filter->val = info.val;
  1111	
  1112				list_add_tail(&filter->list, target_list);
  1113			} else {
  1114				list_for_each_entry(filter, target_list, list)
  1115					if (filter->val == info.val) {
  1116						list_del(&filter->list);
  1117						kfree(filter);
  1118						break;
  1119					}
  1120			}
  1121		}
  1122	
  1123		mutex_unlock(&hisi_ptt->mutex);
  1124	}
  1125	
  1126	static void hisi_ptt_update_fifo_in(struct hisi_ptt *hisi_ptt,
  1127					    struct hisi_ptt_filter_update_info *info)
  1128	{
  1129		struct pci_dev *root_port = pcie_find_root_port(info->pdev);
  1130	
  1131		if (!root_port)
  1132			return;
  1133	
  1134		info->port_devid = PCI_DEVID(root_port->bus->number, root_port->devfn);
  1135		if (info->port_devid < hisi_ptt->lower ||
  1136		    info->port_devid > hisi_ptt->upper)
  1137				return;
  1138	
  1139		info->is_port = pci_pcie_type(info->pdev) == PCI_EXP_TYPE_ROOT_PORT;
  1140		info->val = hisi_ptt_get_filter_val(info->pdev);
  1141	
  1142		if (kfifo_in_spinlocked(&hisi_ptt->filter_update_kfifo, info, 1,
  1143					&hisi_ptt->filter_update_lock))
  1144			schedule_delayed_work(&hisi_ptt->work, 0);
  1145		else
  1146			pci_warn(hisi_ptt->pdev,
  1147				 "filter update fifo overflow for target %s\n",
  1148				 pci_name(info->pdev));
  1149	}
  1150	
  1151	/*
  1152	 * A PCI bus notifier is used here for dynamically updating the filter
  1153	 * list.
  1154	 */
  1155	static int hisi_ptt_notifier_call(struct notifier_block *nb,
  1156					  unsigned long action,
  1157					  void *data)
  1158	{
  1159		struct hisi_ptt *hisi_ptt = container_of(nb, struct hisi_ptt, hisi_ptt_nb);
  1160		struct hisi_ptt_filter_update_info info;
  1161		struct device *dev = data;
  1162		struct pci_dev *pdev = to_pci_dev(dev);
  1163	
  1164		info.pdev = pdev;
  1165	
  1166		switch (action) {
  1167		case BUS_NOTIFY_ADD_DEVICE:
  1168			info.is_add = true;
  1169			break;
  1170		case BUS_NOTIFY_DEL_DEVICE:
  1171			info.is_add = false;
  1172			break;
  1173		default:
  1174			return 0;
  1175		}
  1176	
  1177		hisi_ptt_update_fifo_in(hisi_ptt, &info);
  1178	
  1179		return 0;
  1180	}
  1181	
  1182	static int hisi_ptt_init_filters(struct pci_dev *pdev, void *data)
  1183	{
  1184		struct hisi_ptt_filter_update_info info = {
  1185			.pdev = pdev,
  1186			.is_add = true,
  1187		};
  1188		struct hisi_ptt *hisi_ptt = data;
  1189	
  1190		hisi_ptt_update_fifo_in(hisi_ptt, &info);
  1191	
  1192		return 0;
  1193	}
  1194	
  1195	static void hisi_ptt_release_filters(struct hisi_ptt *hisi_ptt)
  1196	{
  1197		struct hisi_ptt_filter_desc *filter, *tfilter;
  1198	
  1199		list_for_each_entry_safe(filter, tfilter, &hisi_ptt->req_filters, list) {
  1200			list_del(&filter->list);
  1201			kfree(filter);
  1202		}
  1203	
  1204		list_for_each_entry_safe(filter, tfilter, &hisi_ptt->port_filters, list) {
  1205			list_del(&filter->list);
  1206			kfree(filter);
  1207		}
  1208	}
  1209	
  1210	static void hisi_ptt_init_ctrls(struct hisi_ptt *hisi_ptt)
  1211	{
  1212		struct pci_bus *bus;
  1213		u32 reg;
  1214	
  1215		INIT_LIST_HEAD(&hisi_ptt->port_filters);
  1216		INIT_LIST_HEAD(&hisi_ptt->req_filters);
  1217	
  1218		/*
  1219		 * The device range register provides the information about the
  1220		 * root ports which the RCiEP can control and trace. The RCiEP
  1221		 * and the root ports it support are on the same PCIe core, with
  1222		 * same domain number but maybe different bus number. The device
  1223		 * range register will tell us which root ports we can support,
  1224		 * Bit[31:16] indicates the upper BDF numbers of the root port,
  1225		 * while Bit[15:0] indicates the lower.
  1226		 */
  1227		reg = readl(hisi_ptt->iobase + HISI_PTT_DEVICE_RANGE);
  1228		hisi_ptt->upper = reg >> 16;
  1229		hisi_ptt->lower = reg & 0xffff;
  1230	
> 1231		bus = pci_find_bus(pci_domain_nr(hisi_ptt->pdev->bus),
  1232				   PCI_BUS_NUM(hisi_ptt->upper));
  1233		if (bus)
> 1234			pci_walk_bus(bus, hisi_ptt_init_filters, hisi_ptt);
  1235	
  1236		/* Initialize trace controls */
  1237		INIT_LIST_HEAD(&hisi_ptt->trace_ctrl.trace_buf);
  1238		hisi_ptt->trace_ctrl.buflet_nums = HISI_PTT_DEFAULT_TRACE_BUF_CNT;
  1239		hisi_ptt->trace_ctrl.buflet_size = HISI_PTT_TRACE_DEFAULT_BUFLET_SIZE;
  1240		hisi_ptt->trace_ctrl.rxtx = HISI_PTT_TRACE_DEFAULT_RXTX.event_code;
  1241		hisi_ptt->trace_ctrl.tr_event = HISI_PTT_TRACE_DEFAULT_EVENT.event_code;
  1242	}
  1243	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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  parent reply	other threads:[~2021-04-06 22:49 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-06 12:45 [PATCH 0/4] Add support for HiSilicon PCIe Tune and Trace device Yicong Yang
2021-04-06 12:45 ` [PATCH 1/4] hwtracing: Add trace function " Yicong Yang
2021-04-06 13:51   ` Greg KH
2021-04-06 16:14   ` kernel test robot
2021-04-06 22:48   ` kernel test robot [this message]
2021-04-06 12:45 ` [PATCH 2/4] hwtracing: Add tune " Yicong Yang
2021-04-06 12:45 ` [PATCH 3/4] docs: Add documentation for HiSilicon PTT device driver Yicong Yang
2021-04-07 18:55   ` Bjorn Helgaas
2021-04-08 13:22     ` Yicong Yang
2021-04-08 16:57       ` Bjorn Helgaas
2021-04-09 14:09         ` Yicong Yang
2021-04-06 12:45 ` [PATCH 4/4] MAINTAINERS: Add maintainer for HiSilicon PTT driver Yicong Yang
2021-04-06 13:49 ` [PATCH 0/4] Add support for HiSilicon PCIe Tune and Trace device Greg KH
2021-04-07 10:03   ` Yicong Yang
2021-04-07 10:25     ` Greg KH
2021-04-08 13:25       ` Yicong Yang

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