From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: gregkh@linuxfoundation.org
Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org,
linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org,
linux-kernel@vger.kernel.org, loic.poulain@linaro.org,
kvalo@codeaurora.org, ath11k@lists.infradead.org
Subject: Re: [PATCH 00/10] MHI patches for v5.14 - Take 2
Date: Wed, 30 Jun 2021 18:46:56 +0530 [thread overview]
Message-ID: <20210630131656.GA18484@workstation> (raw)
In-Reply-To: <20210625123355.11578-1-manivannan.sadhasivam@linaro.org>
Hi Greg,
On Fri, Jun 25, 2021 at 06:03:45PM +0530, Manivannan Sadhasivam wrote:
> Hi Greg,
>
> Please find the remaining MHI patches for v5.14. This series has the left over
> patches from the previous patchset and one new series that was reviewed a
> while ago and put on hold for Ack from Kalle Valo for ath11k.
>
> Summary:
>
> 1. Added validation for the channel ID read from event ring. If we get events
> from an invalid channel, we throw an error message and skip the event.
>
> 2. Fixed the MHI wake routines used for the newer modems such as SDX55 and
> SDX65 by using no-op routines only for the older modems and then relying on
> the default routines provided by MHI stack for newer ones.
>
> 3. Added support for processing the events based on the priorities. Earlier
> a fixed priority was used for all events.
>
> 4. Added a dedicated flag to the MHI client transfer APIs for inbound
> buffer allocation by the MHI stack. Since this patch modifies the MHI
> client drivers under "net/", Ack has been collected from the netdev
> maintainer.
>
> 5. Added support for Cinterion MV31-W modem in pci_generic controller:
> https://www.thalesgroup.com/en/markets/digital-identity-and-security/iot/iot-connectivity/products/iot-products/mv31-w-ultra-high
>
> 6. Rearranged the setting of BHI/BHIe offsets for better validation of the
> register values read from MMIO
>
> 7. Cleanup of the BHI/BHIe pointers by setting them to NULL to prevent access
> after power down.
>
> 8. Added support for getting the MMIO register length from the controller
> drivers. This helps in validation of the read offsets from MMIO registers.
> Since this patch touches ath11k, Ack has been collected from Kalle Valo.
>
> 9. With the help of above register length, added check for BHI/BHIe offsets.
>
Is this series on your queue for 5.14?
Thanks,
Mani
> Thanks,
> Mani
>
> Bhaumik Bhatt (8):
> bus: mhi: pci_generic: Apply no-op for wake using sideband wake
> boolean
> bus: mhi: core: Validate channel ID when processing command
> completions
> bus: mhi: core: Set BHI/BHIe offsets on power up preparation
> bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up
> bus: mhi: Add MMIO region length to controller structure
> ath11k: set register access length for MHI driver
> bus: mhi: pci_generic: Set register access length for MHI driver
> bus: mhi: core: Add range checks for BHI and BHIe
>
> Loic Poulain (1):
> bus: mhi: Add inbound buffers allocation flag
>
> ULRICH Thomas (1):
> bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI
>
> drivers/bus/mhi/core/init.c | 61 +++++++++++++++++--------
> drivers/bus/mhi/core/internal.h | 2 +-
> drivers/bus/mhi/core/main.c | 26 +++++++----
> drivers/bus/mhi/core/pm.c | 28 ++----------
> drivers/bus/mhi/pci_generic.c | 65 +++++++++++++++++++++++----
> drivers/net/mhi/net.c | 2 +-
> drivers/net/wireless/ath/ath11k/mhi.c | 1 +
> drivers/net/wwan/mhi_wwan_ctrl.c | 2 +-
> include/linux/mhi.h | 9 +++-
> net/qrtr/mhi.c | 2 +-
> 10 files changed, 134 insertions(+), 64 deletions(-)
>
> --
> 2.25.1
>
next prev parent reply other threads:[~2021-06-30 13:17 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-25 12:33 [PATCH 00/10] MHI patches for v5.14 - Take 2 Manivannan Sadhasivam
2021-06-25 12:33 ` [PATCH 01/10] bus: mhi: Add inbound buffers allocation flag Manivannan Sadhasivam
2021-06-25 12:33 ` [PATCH 02/10] bus: mhi: pci_generic: Apply no-op for wake using sideband wake boolean Manivannan Sadhasivam
2021-06-25 12:33 ` [PATCH 03/10] bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI Manivannan Sadhasivam
2021-06-25 12:33 ` [PATCH 04/10] bus: mhi: core: Validate channel ID when processing command completions Manivannan Sadhasivam
2021-06-25 12:33 ` [PATCH 05/10] bus: mhi: core: Set BHI/BHIe offsets on power up preparation Manivannan Sadhasivam
2021-06-25 12:33 ` [PATCH 06/10] bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up Manivannan Sadhasivam
2021-06-25 12:38 ` Greg KH
2021-06-25 13:03 ` Manivannan Sadhasivam
2021-06-25 12:33 ` [PATCH 07/10] bus: mhi: Add MMIO region length to controller structure Manivannan Sadhasivam
2021-06-25 12:33 ` [PATCH 08/10] ath11k: set register access length for MHI driver Manivannan Sadhasivam
2021-06-25 12:33 ` [PATCH 09/10] bus: mhi: pci_generic: Set " Manivannan Sadhasivam
2021-06-25 12:33 ` [PATCH 10/10] bus: mhi: core: Add range checks for BHI and BHIe Manivannan Sadhasivam
2021-06-30 13:16 ` Manivannan Sadhasivam [this message]
2021-06-30 13:25 ` [PATCH 00/10] MHI patches for v5.14 - Take 2 Greg KH
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